SI3201-BS Ver la hoja de datos (PDF) - Silicon Laboratories

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SI3201-BS

PROSLIC® PROGRAMMABLE CMOS SLIC WITH RINGING/BATTERY VOLTAGE GENERATION

Silicon Laboratories 

Si3230

Table 3. AC Characteristics (Continued)

(VDDA, VDDD = 3.13 to 5.25 V, TA = 0 to 70°C for K-Grade, –40 to 85°C for B-Grade)

Parameter

Longitudinal to Metallic Balance

Metallic to Longitudinal Balance

Longitudinal Impedance

Longitudinal Current per Pin

Test Condition

Min

Longitudinal Performance

200 Hz to 3.4 kHz, βQ1,Q2 ≥

150, 1% mismatch

βQ1,Q2 = 60 to 2404

βQ1,Q2 = 300 to 8004

Using Si3201

56

43

53

TBD

200 Hz to 3.4 kHz

40

200 Hz to 3.4 kHz at TIP or

RING

Register selectable

ETBO/ETBA

00

—

01

—

10

—

Active off-hook

200 Hz to 3.4 kHz

Register selectable

ETBO/ETBA

00

—

01

—

10

—

Typ

Max

Unit

60

—

dB

60

—

dB

60

—

dB

60

—

dB

—

—

dB

33

—

Ω

17

—

Ω

17

—

Ω

4

—

mA

8

—

mA

8

—

mA

Notes:

1. Analog signal measured as VTIP – VRING. Assumes ideal line impedance matching.

2. The quantization errors inherent in the µ/A-law companding process can generate slightly worse gain tracking

performance in the signal range of 3 dB to –37 dB for signal frequencies that are integer divisors of the 8 kHz PCM

sampling rate.

3. The level of any unwanted tones within the bandwidth of 0 to 4 kHz does not exceed –55 dBm.

4. Assumes normal distribution of betas.

6

Preliminary Rev. 0.96

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