MRFIC2006R2 Ver la hoja de datos (PDF) - Motorola => Freescale

Número de pieza

componentes Descripción

Fabricante

MRFIC2006R2

900 MHz 2 Stage PA

Motorola => Freescale 

APPLICATIONS INFORMATION

DESIGN PHILOSOPHY

The MRFIC2006 was designed for low cost and flexibility.

Low cost was achieved by minimizing external components

and using an SOIC package. Flexibility was achieved by al-

lowing the bias current to be externally adjustable resulting in

a broad range of output power capability. The bias pin can be

ramped to reduce AM splatter in TDD/TDMA systems and

can be used to trim the RF output power.

THEORY OF OPERATION

The input port is internally matched to 50 ohms. Return

loss is typically 15 –16 dB in the 800 –1000 MHz range. The

output port is nearly 50 ohms but is an open collector and

therefore requires an external bias inductor. Using an RF

choke will result in a 11–12 dB output return loss. However, a

10 nH inductor will improve it to 15 – 20 dB. A 10 nH inductor

is small enough in value to be printed on the board. DC

blocks are required on the input and output. Values of 100 pF

are recommended.

Supply decoupling must be done as close to the IC as pos-

sible. A 1000 pF capacitor is recommended. A series RF

choke is recommended to keep the RF signal off the supply

line. A 10 nF decoupling capacitor is recommended on the

Vbias line but does not need to be very close to the IC.

The Vbias pin can be used several ways. Tying it directly to

VCC will maximize the bias current which will maximize lin-

earity. Adding a series resistor will reduce the bias current

which will improve efficiency. Figure 9 shows the efficiency

versus output power with Vbias tied to VCC. The series re-

sistor will cause these curves to shift to the left. The RF out-

put power can be trimmed by using a variable resistor. The

Vbias pin can also be used to power down the IC or, in the

case of TDD/TDMA systems, to ramp the IC. By applying a

linear ramp voltage, such as the one provided by the

MRFIC2004, it has been demonstrated to meet the CT2

Common Air Interface splatter specifications.

The MRFIC2006 is internally temperature compensated.

For input powers of – 5.0 to 0 dBm the output power tempera-

ture variation is typically less than 0.2 dB from – 35 to + 85°C.

EVALUATION BOARDS

Evaluation boards are available for RF Monolithic Inte-

grated Circuits by adding a “TF” suffix to the device type.

For a complete list of currently available boards and ones

in development for newly introduced product, please con-

tact your local Motorola Distributor or Sales Office.

MOTOROLA RF DEVICE DATA

MRFIC2006

7

Share Link: