QL4090-2CF208C Ver la hoja de datos (PDF) - QuickLogic Corporation
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QL4090-2CF208C Datasheet PDF : 18 Pages
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QL4009 QuickRAM Data Sheet Rev C
AC Characteristics at VCC = 3.3 V, TA = 25° C (K = 1.00)
To calculate delays, multiply the appropriate K factor from Table 10 by the following numbers
in the tables provided.
QS
A1
A2
A3
A4
AZ
A5
A6
QS
OP
B1
B2
C1
OZ
C2
MP
MS
QZ
D1
D2
E1
E2
NP
NZ
NS
F1
F2
F3
F4
FZ
F5
F6
QC
QR
Figure 3: QuickRAM Logic Cell
Symbol
tPD
tSU
tH
tCLK
tCWHI
tCWLO
tSET
tRESET
tSW
tRW
Table 1: Logic Cell
Parameter
Propagation Delays (ns)
Fanout (5)
Combinatorial Delaya
Setup Timea
1
2
3
4
5
1.4 1.7 1.9 2.2 3.2
1.7 1.7 1.7 1.7 1.7
Hold Time
0.0 0.0 0.0 0.0 0.0
Clock to Q Delay
0.7 1.0 1.2 1.5 2.5
Clock High Time
1.2 1.2 1.2 1.2 1.2
Clock Low Time
1.2 1.2 1.2 1.2 1.2
Set Delay
1.0 1.3 1.5 1.8 2.8
Reset Delay
0.8 1.1 1.3 1.6 2.6
Set Width
1.9 1.9 1.9 1.9 1.9
Reset Width
1.8 1.8 1.8 1.8 1.8
a. These limits are derived from a representative selection of the slowest paths through the Quick-
RAM logic cell including typical net delays. Worst case delay values for specific paths should be
determined from timing analysis of your particular design.
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