SC26C562(2006) Ver la hoja de datos (PDF) - Philips Electronics

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componentes Descripción

Fabricante

SC26C562
(Rev.:2006)

CMOS dual universal serial communications controller (CDUSCC)

Philips Electronics 

Philips Semiconductors

CMOS dual universal serial communications controller

(CDUSCC)

Product data sheet

SC26C562

MNEMONIC

TxDAKA/BN,

GPI2A/BN

EOPN

RTSA/BN,

SYNOUTA/BN

VCC

GND

PIN

38, 16

29

45, 9

34, 52

26, 13,

41, 7

TYPE

I

I/O

O

I

I

NAME AND FUNCTION

Channel A (B) Transmitter DMA Acknowledge or General Purpose Input: Active-LOW. When the

channel is programmed for full-duplex single address DMA operation, this input is asserted to

indicate to the CDUSCC that the DMA controller has acquired the bus and that the requested load

transmitter FIFO bus cycle is beginning. Because the state of this input can be read under program

control, it can be used as a general purpose input when not in full-duplex single address DMA mode.

Done (EOP): Active-LOW, open-drain. EOPN can be used and is active in both DMA and non-DMA

modes. As an input, EOPN indicates the last DMA transfer cycle to the TxFIFO. As an output, EOPN

indicates either the last DMA transfer from the RxFIFO or that the transmitted character count has

reached terminal count.

Channel A (B) Sync Detect or Request-to-Send: Active-LOW. If programmed as a sync output, it

is asserted one bit time after the specified sync character (COP or BISYNC modes) or a FLAG (BOP

modes) is detected by the receiver. As a Request-to-Send modem control signal, it functions as

described previously for the TxDRQN/RTSN pin.

+5 V Power Input

Signal and Power Ground Input

2006 Aug 10

7

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