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SC1458 Datasheet PDF : 13 Pages
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SC1458
Applications Information
General Description
The SC1458 is a dual output linear regulator intended
for applications where low dropout voltage, low supply
current, and low output noise are critical. The device
provides a very simple, low cost solution for two separate
regulated outputs using very little PCB area due to its
small package size and the need for only three external
capacitors.
Both linear regulators are powered from a single input
voltage supply rail, and each provides 300mA of output
current. Output voltages are set internally, eliminating the
need for external resistors.
Active Shutdown
The SC1458 has internal active shutdown circuitry
included for both LDOs. Shutdown behavior is controlled
by discharging the output capacitor on the LDO output
by an on-chip FET when the LDO is disabled.
Protection Circuitry
The device provides the following protection features to
ensure that no damage is incurred in the event of a fault
condition.
• Under-Voltage Lockout
• Over-Temperature Protection
• Short-Circuit Protection
An active high enable pin (EN) controls operation of both
regulators. Pulling this pin low causes the device to enter a
very low power shutdown mode, where it typically draws
100nA from the input supply.
Under-Voltage Lockout
The Under-Voltage LockOut (UVLO) circuit protects the
device from operating in an unknown state if the input
voltage supply is too low.
The device is available in two versions: SC1458A and
SC1458B. The SC1458A version has pin 6 configured as a
power good signal (PGOOD), which monitors the output
of LDOA. The SC1458B device has pin 6 configured as an
external bypass pin (BYP). This is suitable for applications
which require low output noise and excellent PSRR
characteristics.
Power-On Control
When EN transitions high, the output of LDOA is enabled.
After a delay of 128μs, the output of LDOB is enabled.
In the case of the SC1458A, when the output voltage of
LDOA reaches 87% of its regulation point, the delay timer
starts and the PGOOD signal transitions high after a delay
of 200ms. The power up/down sequence is shown in
Figure 1.
EN
OUTA
87%
200 ms
87%
PGOOD
OUTB
128μs
Figure 1 — Timing Diagram
When the V drops below the UVLO threshold, the
IN
LDOs are disabled and discharged — PGOOD is held
low (SC1458A only). When V is increased above the
IN
hysteresis level, the LDOs are enabled into their previous
states (timing described in Figure 1), provided EN has
remained high. When powering-up with V below the
IN
UVLO threshold, the LDOs will remain off and PGOOD
will be held low (SC1458A only).
Over-Temperature Protection
An internal over-temperature (OT) protection circuit is
provided that monitors the internal junction temperature.
When the temperature exceeds the OT threshold as
defined in the Electrical Characteristics section, the OT
protection disables all the LDO outputs and holds the
PGOOD signal low. When the junction temperature drops
below the hysteresis level, the LDOs are re-enabled into
their previous states and PGOOD is set high, provided EN
has remained high (SC1458A only).
Short-Circuit Protection
Each LDO output has short-circuit protection. If the
output current exceeds the current limit, the output
voltage will drop and the output current will be limited
until the short is removed. If a short-circuit occurs on the
output of LDOA, the output of LDOB will also be disabled
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