SC1104B(2001) Ver la hoja de datos (PDF) - Semtech Corporation
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SC1104B Datasheet PDF : 7 Pages
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SC1104A/B
POWER MANAGEMENT
Theory of Operation
Synchronous Buck Converter
PRELIMINARY
The circuit will be in steady state when Vout =3.3V ,
Vsense = 1V, Icomp = 0 . The COMP voltage and duty
cycle depend on Vin.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier. The
inverting input of the error amplifier receives its voltage
from the SENSE pin.
The non-inverting input of the error amplifier is connected
to an internal 1V reference.
Under Voltage Lockout
The under voltage lockout circuit of the SC1104A/B as-
sures that both high-side and low-side MOS.ET driver
outputs remain in the off state whenever the supply volt-
age drops below set parameters. Lockout occurs if VCC
falls below 4.2V typ.
The error amplifier output is connected to the
COMPensation pin. The error amplifier generates a cur-
rent proportional to (Vsense 1V), which is the COMP
pin output current (Transconductance ~ 10mS). The
voltage on the COMP pin is the integral of the error am-
plifier current. The COMP voltage is the non-inverting
input to the PWM comparator and controls the duty cycle
of the MOS.ET drivers. The size of capacitor Ccomp con-
trols the stability and transient response of the regula-
tor. The larger the capacitor, the slower the COMP volt-
age changes, and the slower the duty cycle changes.
RDS(ON) Current Limiting
In case of a short circuit or overload, the high-side (HS)
.ET will conduct large currents. To prevent damage, in
this situation, large currents will generate a fault condi-
tion and begin a soft start cycle.
While the HS driver is on, the phase voltage is compared
to the Vcc pin voltage. If the phase voltage is 200mV
lower than Vcc, a fault is latched and the soft start cycle
begins.
The inverting input voltage of the PWM comparator is
the triangular output of the oscillator.
The voltages are compared during the middle of the HS
pulse, to prevent transients from affecting the accuracy.
When the oscillator output voltage drops below the COMP
voltage, the comparator output goes high. This pulls DL
low, turning off the low-side .ET. After a short delay (dead
time), DH is pulled high, turning on the high-side .ET.
When the oscillator voltage rises back above the error
amplifier output voltage, the comparator output goes low.
This pulls DH low, turning off the high-side .ET, and after
a dead time delay, DL is pulled high, turning on the low-
side .ET. The dead time delay is determined by a
monostable on the chip.
The triangle wave minimum is about 1V, and the maxi-
mum is about 2V. Thus, if Vcomp = 0.9V, high side duty
cycle is the minimum (~0%) , but if Vcomp is 2.0V, duty
cycle is at maximum ( ~80%).The internal oscillator uses
an on-chip capacitor and trimmed precision current
sources to set the oscillation frequency to 300/600kHz.
.igure 1 shows a 3.3V output converter. If the Vout <3.3V,
then the SENSE voltage < 1V. In this case the error
amplifier will be sourcing current into the COMP pin so
that COMP voltage and duty cycle will gradually increase.
If Vout > 3.3V, the error amplifier will sink current and
reduce the COMP voltage, so that duty cycle will decrease.
Soft Start
The soft start (or hiccup) circuitry is activated when a
fault occurs. .aults occur for three reasons:
1) Under voltage (VCC < 4.2V)
2) Over temperature (die temperature > 150°C)
3) Over current in high side .ET.
All faults are handled the same way. Both DH and DL are
forced low. The error amplifier is turned off, but a 2µA
current flows into the comp pin (soft start current). The
sink current reduces the Comp voltage down to 0.6V
over a period of a few milliseconds. When Vcomp ~ 0.6V,
the fault is cleared and the DL goes high. Also, the soft
start current changes polarity and begins to increase the
voltage on the Comp capacitor. The DH remains low, be-
cause Vcomp is less than the lowest excursion of the
oscillator ramp (1.0V). After a few ms, the Vcomp in-
creases to about 1.0V and the DH will start to switch.
The duty cycle will gradually increase, and Vsns will in-
crease. When Vsns ~ 1.00V, the error amplifier turns on
again. The circuit has now reached its operating point. If
a fault occurs during the soft start, the cycle will begin
again (drivers low, Vcomp decreasing down to 0.6V).
© 2001 Semtech Corp.
6
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