SAA7392 Ver la hoja de datos (PDF) - Philips Electronics
Número de pieza
componentes Descripción
Fabricante
SAA7392 Datasheet PDF : 76 Pages
| |||
Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.2.1 INTERRUPT PIN
The interrupt pin (INT) is the AND-OR-INVERT of the Status and Interrupt Enable Registers, i.e. INT will become active
when corresponding bits are set at the same time in the Status and Interrupt Enable Registers.
7.2.2 THE SEMAPHORE REGISTERS (SEMA1, SEMA2 AND SEMA3)
The Semaphore Registers are intended for inter-microprocessor communications. For example, microcontroller 1 can
write data to microcontroller 2 via Sema1 and microcontroller 2 can write data to microcontroller 1 via Sema2. The Status
Register of the SAA7392 offers a mechanism so that both microcontrollers can see when new data has been written and
when it has been read by looking at the contents of the Semaphore Registers. Version M3 of the CDR60 can be identified
by writing and reading register Sema3. In version M3, bit 1 of Sema3 is always read as logic 0, whereas in other CDR60
versions this bit reads the same value as what was written to it before.
7.2.2.1 Semaphore Register 1 (Sema1)
Table 4 Semaphore Register 1 (address 08H) - READ/WRITE
7
Sema1.7
6
Sema1.6
5
Sema1.5
4
Sema1.4
3
Sema1.3
2
Sema1.2
1
Sema1.1
0
Sema1.0
7.2.2.2 Semaphore Register 2 (Sema2)
Table 5 Semaphore Register 2 (address 09H) - READ/WRITE
7
Sema2.7
6
Sema2.6
5
Sema2.5
4
Sema2.4
3
Sema2.3
2
Sema2.2
1
Sema2.1
0
Sema2.0
7.2.2.3 Semaphore Register 3 (Sema3)
Table 6 Semaphore Register 3 (address 0AH) - READ/WRITE
7
Sema3.7
6
Sema3.6
5
Sema3.5
4
Sema3.4
3
Sema3.3
2
Sema3.2
1
Sema3.1
0
Sema3.0
7.2.3 STATUS REGISTER (STATUS)
Table 7 Status Register (address 0BH) - READ
7
6
5
4
3
2
1
0
Sema1
Sema2
Sema3
LockIn
HeaderVal MotorOverflow FIFOOv
−
Table 8 Description of Status bits
BIT
SYMBOL
DESCRIPTION
7
Sema1 If Sema1 = 1, change in register Sema1 has been detected. Reset if register Sema1 read.
6
Sema2 If Sema2 = 1, change in register Sema2 has been detected. Reset if register Sema2 read.
5
Sema3 If Sema3 = 1, change in register Sema3 has been detected. Reset if register Sema3 read.
4
LockIn If LockIn = 1, then channel data PLL in lock (not latched).
3
HeaderVal HeaderVal is set when new header/subcode is available; reset on reading SubReadEnd.
2 MotorOverflow If MotorOverflow = 1, then a motor overflow is occurring (not latched).
1
FIFOOv If FIFOOv = 1, then the FIFO has overflowed.
0
−
This bit is reserved.
2000 Mar 21
13
Share Link: 