SAA7390 Ver la hoja de datos (PDF) - Philips Electronics

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SAA7390

High performance Compact Disc-Recordable (CD-R) controller

Philips Electronics 

Philips Semiconductors

High performance Compact

Disc-Recordable (CD-R) controller

5 BLOCK DIAGRAM

handbook, full pagewidth

256K × 8 to 4M × 8

DRAM BUFFER

Preliminary specification

SAA7390

CD

DECODER

data subcode

DATA

CONVERTER

AND SUB-CODE

UART

data

subcode

C-flag

BUFFER MANAGER

LAYERED

ERROR

CORRECTOR

ENCODE

BUFFER

MAPPER

GENERIC

EXTERNAL

INTERFACE

MICROCONTROLLER INTERFACE

BASIC

ENGINE

WRITE I/F

SAA7390

SPI UART

S2B UART

MGE518

80C32 MICROCONTROLLER

SCSI

or

ATAPI

interface

S2B

interface

SPI

interface

128K × 8 ROM

Fig.1 Block diagram (simplified).

6 PINNING

All input and bidirectional signals are TTL level with Schmitt-trigger logic, with the exception of OSCIN. All output

signals are TTL levels unless otherwise stated. (PD = internal pull-down; PU = internal pull-up).

SYMBOL PIN

I/O

TYPE

DESCRIPTION

DA0

DA1

DA2

VSS1

DA3

DA4

DA5

VSS2

DA6

1

O

2

O

3

O

4

−

5

O

6

O

7

O

8

−

9

O

DRAM address bus; bit DA0

DRAM address bus; bit DA1

DRAM address bus; bit DA2

ground 1

DRAM address bus; bit DA3

DRAM address bus; bit DA4

DRAM address bus; bit DA5

ground 2

DRAM address bus; bit DA6

1996 Jul 02

5

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