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SAA7325 Ver la hoja de datos (PDF) - Philips Electronics

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SAA7325 Datasheet PDF : 68 Pages
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Philips Semiconductors
Digital servo processor and Compact Disc
decoder with integrated DAC (CD10)
Product specification
SAA7325
handbook, full pagewidth
HFREF 1
HFIN 2
ISLICE 3
VSSA1 4
VDDA1 5
Iref 6
VRIN 7
D1 8
D2 9
D3 10
D4 11
R1 12
R2 13
VSSA2 14
CROUT 15
CRIN 16
SAA7325H
48 SBSY
47 SFSY
46 SUB
45 RCK
44 TEST3
43 STATUS
42 SILD
41 RAB
40 SCL
39 SDA
38 RESET
37 SCLI
36 SDI
35 WCLI
34 V2/V3
33 VSSD1
MGL693
Fig.2 Pin configuration.
7 FUNCTIONAL DESCRIPTION
7.1 Decoder part
7.1.1 PRINCIPAL OPERATIONAL MODES OF THE DECODER
The decoding part supports a full audio specification at
single-speed (n = 1). A simplified data flow through the
decoder part is illustrated in Fig.7.
(see Section 7.2). The range of crystal and oscillator
frequencies possible is controlled via decoder register B
and shown in Table 1. The MSB of decoder register B
must be set to logic 0.
The internal clock multiplier is controlled by SELPLL, and
should only be used if a 8.4672 or 16.9344 MHz crystal,
ceramic resonator or external clock is present.
7.1.2 DECODING SPEED AND CRYSTAL FREQUENCY
The SAA7325 is a single-speed decoding device, with an
internal Phase-Locked Loop (PLL) clock multiplier allowing
a choice of different crystals and oscillators to be used
1999 Jun 17
8

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