SA9604ASA Ver la hoja de datos (PDF) - South African Micro Electronic Systems

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SA9604ASA

THREE PHASE BIDIRECTIONAL POWER/ENERGY METERING IC WITH SERIAL SPI INTERFACE

South African Micro Electronic Systems 

SPI TIMING

SA9604A

Parameter Description

Min Max Unit

t1

SCK rising edge for data valid

1,160 µS

t2

Setup time for DI and CS before the rising edge

of SCK

0,560

µS

t3

SCK min high time

0,625

µS

t4

SCK min low time

0,625

µS

5.6 Synchronised Reading of Registers

The SA9604A integrated circuit updates the registers on a continual basis. The

SA9604A register content in latched onto the SPI interface as soon as a read

command has been detected or the next register is addressed during continual

access. The registers can be accessed at any time however for maximum stability

the time between readings must be in multiples of 8 mains cycles. The internal offset

cancellation procedure requires 8 mains cycles to complete. The registers are not

reset after access, so in order to determine the correct register value the previous

value read must be subtracted from the current reading. This methodology holds

true for Active, Reactive and Voltage registers. The data read from the registers

sames

9/20

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