SA8028 Ver la hoja de datos (PDF) - Philips Electronics

Número de pieza

componentes Descripción

Fabricante

SA8028

2.5 GHz sigma delta fractional-N / 760 MHz IF integer frequency synthesizers

Philips Electronics 

Philips Semiconductors

2.5 GHz sigma delta fractional-N /

760 MHz IF integer frequency synthesizers

Product data

SA8028

SYMBOL PARAMETER

CONDITIONS

Phase noise (condition RSET = 7.5 kΩ, CP = 00, non speed-up mode)

L(f)

Synthesizer’s contribution to close-in phase

fREF = 13 MHz, TCXO,

noise of 900 MHz RF signal at 5 kHz offset.

fCOMP = 13 MHz

indicative, not tested

MIN.

–

Synthesizer’s contribution to close-in phase

As above

–

noise of 1800 MHz RF signal at 5 kHz offset.

Synthesizer’s contribution to close-in phase

noise of 800 MHz RF signal at 5 kHz offset.

fREF = 19.44/19.68 MHz, TCXO, –

fCOMP = 19.44/19.68 MHz

indicative, not tested

Synthesizer’s contribution to close-in phase

As above

–

noise of 2100 MHz RF signal at 5 kHz offset.

Interface logic input signal levels

VIH

HIGH level input voltage

0.7*VDD

VIL

LOW level input voltage

–0.3

ILEAK

Input leakage current

VDD = 3 V, VIH = 3 V,

VIL = 0 V

–0.5

Lock detect output signal (in push/pull mode) and Data output signal (in readout test mode)

VOL

LOW level output voltage

VOH

HIGH level output voltage

Isink = 2 mA

Isource = –2 mA

–

VDD–0.4

NOTES:

V

1.

ISET =

SET

RSET

bias current for charge pumps.

2. The relative output current variation is defined as:

∆IZOUT

IZOUT

= 2 × ( I 2 – I 1) ;

| I2 + I1 |

TYP.

–99

–93

–101

–93

–

–

–

–

–

With I1 @ V1 = 0.6 V, I2 @V2 = VDDCP – 0.7 V (see Figure 3).

IZOUT

CURRENT

I2

I1

MAX.

–

UNIT

dBc/Hz

–

dBc/Hz

–

dBc/Hz

–

dBc/Hz

VDD+0.3 V

0.3*VDD V

+0.5

µA

0.4

V

–

V

VOLTAGE

V1

V2

VPH

I2

I1

Figure 3. Relative output current variation.

SR00602

2002 Feb 22

7

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