SA8028 Ver la hoja de datos (PDF) - Philips Electronics
Número de pieza
componentes Descripción
Fabricante
SA8028
Philips Electronics
SA8028 Datasheet PDF : 28 Pages
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Philips Semiconductors
2.5 GHz sigma delta fractional-N /
760 MHz IF integer frequency synthesizers
Product data
SA8028
GENERAL DESCRIPTION
The SA8028 BICMOS device integrates programmable dividers,
charge pumps and phase comparators to implement phase–locked
loops. The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 3 V supplies.
The synthesizer operates at VCO input frequencies up to 2.5 GHz.
The synthesizer has fully programmable RF, IF, and reference
dividers. All divider ratios are supplied via a 3-wire serial
programming bus. The RF divider is a fractional-N divider with
programmable integer ratios from 33 to 509 and a fractional
resolution of 22 programmable bits (23 bits internal). A 2nd order
sigma-delta modulator is used to achieve fractional division.
Separate power and ground pins are provided to the charge pumps
and digital circuits. VDDCP must be equal to or greater than VDD.
The ground pins should be externally connected to prevent large
currents from flowing across the die and thus causing damage.
The charge pump current (gain) is fully programmable, while ISET is
set by an external resistance at the RSET pin (refer to section 1.5,
RF and IF Charge Pumps). The phase/frequency detector charge
pump outputs allow for implementing a passive loop filter.
FEATURES
• Extremely low phase noise:
L(f) = –101 dBc/Hz at 5 kHz offset at 800 MHz
• Low power
• Programmable Normal & Integral charge pump outputs:
Maximum output = 10.4 mA
• Digital fractional spurious compensation
• Hardware and software power-down
• IDDsleep < 0.1 µA (typ) at VDD = 3.0 V
• Seperate supply for VDD and VDDCP
• Programmable loop filter bandwidth
APPLICATIONS
• 500 to 2500 MHz wireless equipment
• Cellular phones, all standards including:
CDMA : IS95-B,C WCDMA
3G
: WCDMA / UMTS
GSM : EDGE / GPRS
TDMA : IS136 and EDGE
GAIT : GSM and TDMA
• WLAN
• Wireless PDAs
• Satellite tuners and all other high frequency equipment
• Extreme fine frequency resolution applications
VDDPre
GND
GNDPre
RFin+
RFin–
GNDCP
1 24 23 22 21 20 19
2
18
3
17
4
TOP VIEW
16
5
15
6
14
7 8 9 10 11 12 13
CLOCK
REFin+
REFin–
RSET
VDDCP
N/C
SR02176
Figure 1. HBCC24 pin configuration.
ORDERING INFORMATION
TYPE NUMBER PACKAGE
NAME
DESCRIPTION
SA8028W
HBCC24
Plastic, heatsink bottom chip carrier; 24 terminals; body 4 x 4 x 0.65 mm (CSP package)
VERSION
SOT564-1
2002 Feb 22
2
853-2277 27777
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