Philips Semiconductors
9-bit analog-to-digital converter
for digital video
Product specification
TDA8761A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
Reference voltages for the resistor ladder; see Table 1
VRB
reference voltage BOTTOM
1.2
VRT
reference voltage TOP
3.2
Vdiff
differential reference voltage
2
VRT − VRB
Iref
reference current
VRT − VRB = 2.13 V
−
RLAD
resistor ladder
−
TCRLAD temperature coefficient of the
−
resistor ladder
−
VosB
offset voltage BOTTOM
note 2
−
VosT
offset voltage TOP
note 2
−
Vi(p-p)
analog input voltage
note 3
1.7
(peak-to-peak value)
1.3
3.43
2.13
8.7
245
1 860
456
160
160
1.81
Outputs
DIGITAL OUTPUTS D8 TO D0 AND IR (REFERENCED TO OGND)
VOL
LOW-level output voltage
IOL = 1 mA
VOH
HIGH-level output voltage
IOH = −1 mA
IOZ
output current in 3-state mode 0.5 V < VO < VCCO
Switching characteristics
0
−
VCCO − 0.5 −
−20
−
CLOCK INPUT CLK; see Fig.4; note 1
fclk(max)
tCPH
tCPL
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
Analog signal processing
40
−
10
−
10
−
LINEARITY
INL
integral non-linearity
AINL
AC integral non-linearity
DNL
ADNL
differential non-linearity
AC differential non-linearity
OFER offset error
GER
gain error (from
device to device)
fclk = 30 MHz; ramp input −
full-scale input sine
−
wave; note 4
50% full-scale input sine −
wave; note 4
fclk = 30 MHz; ramp input −
full-scale input sine
−
wave; note 4
50% full-scale input sine −
wave; note 4
middle code;
−
VRB = 1.3 V;
VRT = 3.43 V
VRB = 1.3 V;
−
VRT = 3.43 V; note 5
±0.4
±0.75
±0.5
±0.3
±0.5
±0.3
±1
±0.1
MAX.
UNIT
2.45
V
VCCA − 0.8 V
3.0
V
−
mA
−
Ω
−
ppm
−
mΩ/K
−
mV
−
mV
2.55
V
0.5
V
VCCO
V
+20
µA
−
MHz
−
ns
−
ns
±1
LSB
±0.9
LSB
±0.75
LSB
±0.7
LSB
±0.75
LSB
±0.5
LSB
−
LSB
−
%
1998 Nov 03
7