S3C831B Ver la hoja de datos (PDF) - Samsung

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S3C831B

8-Bit CMOS Microcontroller

Samsung 

S3C831B/P831B

ADDRESS SPACES

REGISTER PAGE POINTER (PP)

The S3C8-series architecture supports the logical expansion of the physical 256-byte internal register file (using

an 8-bit data bus) into as many as 16 separately addressable register pages. Page addressing is controlled by the

register page pointer (PP, DFH). In the S3C831B microcontroller, a paged register file expansion is implemented

for LCD data registers, and the register page pointer must be changed to address other pages.

After a reset, the page pointer's source value (lower nibble) and the destination value (upper nibble) are always

"0000", automatically selecting page 0 as the source and destination page for register addressing.

MSB .7

Register Page Pointer (PP)

DFH ,Set 1, R/W

.6 .5 .4 .3 .2 .1

.0 LSB

Destination register page selection bits:

0000 Destination: Page 0

Source register page selection bits:

0000 Source: Page 0

NOTE:

A hardware reset operation writes the 4-bit destination and

source values shown above to the register page pointer. These values should

be modified to address other pages.

Figure 2-3. Register Page Pointer (PP)

F PROGRAMMING TIP — Using the Page Pointer for RAM clear (Page 0, Page 1)

RAMCL0

RAMCL1

LD

SRP

LD

CLR

DJNZ

CLR

LD

LD

CLR

DJNZ

CLR

PP,#00H

#0C0H

R0,#0FFH

@R0

R0,RAMCL0

@R0

PP,#10H

R0,#0FFH

@R0

R0,RAMCL1

@R0

; Destination ← 0, Source ← 0

; Page 0 RAM clear starts

; R0 = 00H

; Destination ← 1, Source ← 0

; Page 1 RAM clear starts

; R0 = 00H

NOTE: You should refer to page 6-39 and use DJNZ instruction properly when DJNZ instruction is used in your program.

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