S3C831B Ver la hoja de datos (PDF) - Samsung

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S3C831B

8-Bit CMOS Microcontroller

Samsung 

S3C831B/P831B

ADDRESS SPACES

REGISTER ARCHITECTURE

In the S3C831B implementation, the upper 64-byte area of register files is expanded two 64-byte areas, called

set 1 and set 2. The upper 32-byte area of set 1 is further expanded two 32-byte register banks (bank 0 and bank

1), and the lower 32-byte area is a single 32-byte common area.

In case of S3C831B the total number of addressable 8-bit registers is 2,646. Of these 2,646 registers, 13 bytes

are for CPU and system control registers, 57 bytes are for peripheral control and data registers, 16 bytes are

used as a shared working registers, and 2,560 registers are for general-purpose use, page 0-page 9 (including 20

bytes for LCD display registers).

You can always address set 1 register locations, regardless of which of the ten register pages is currently

selected. Set 1 locations, however, can only be addressed using register addressing modes.

The extension of register space into separately addressable areas (sets, banks, and pages) is supported by

various addressing mode restrictions, the select bank instructions, SB0 and SB1, and the register page pointer

(PP).

Specific register types and the area (in bytes) that they occupy in the register file are summarized in Table 2–1.

Table 2-1. S3C831B Register Type Summary

Register Type

General-purpose registers (including the 16-byte

common working register area, ten 192-byte prime

register area (including LCD data registers), and ten 64-

byte set 2 area).

CPU and system control registers

Mapped clock, peripheral, I/O control, and data registers

Total Addressable Bytes

Number of Bytes

2,576

13

57

2,646

2-3

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