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S3C72I9

The S3C72I9 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

Samsung 

S3C72I9/P72I9

PRODUCT OVERVIEW

PIN DESCRIPTIONS

Pin Name

P0.0

P0.1

P0.2

P0.3

P1.0

P1.1

P1.2

P1.3

P2.0

P2.1

P2.2

P3.0

P3.1

P3.2

P3.3

P4.0-P4.3

P5.0-P5.3

P6.0-P6.3

P7.0-P7.3

P8.0-P8.3

P9.0-P9.3

SCK

SO

SI

BUZ

INT0, INT1

Table 1-1. S3C72I9 Pin Descriptions

Pin Type

I/O

I

I/O

I/O

I/O

I/O

Description

Number

4-bit I/O port.

11

1-bit and 4-bit read/write and test are possible.

12

Individual pins are software configurable as input or

13

output.

14

Individual pins are software configurable as open-

drain or push-pull output.

4-bit pull-up resistors are software assignable; pull-up

resistors are automatically disabled for output pins.

4-bit input port.

23

1-bit and 4-bit read and test are possible.

24

4-bit pull-up resistors are assignable by software.

25

26

Same as port 0 except that port 2 is 3-bit I/O port.

27

28

29

Same as port 0.

30

31

32

33

4-bit I/O ports.

1-, 4-bit or 8-bit read/write and test are possible.

Individual pins are software configurable as input or

output.

4-bit pull-up resistors are software assignable; pull-up

resistors are automatically disabled for output pins.

42-45

46-49

Same as P4, P5.

50-53

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SCK/K0

SO/K1

SI/K2

BUZ/K3

INT0

INT1

INT2

INT4

CLO

LCDCK

LCDSY

TCLO0

TCLO1

TCL0

TCL1

COM8-

COM11

COM12-

COM15

SEG55/K4-

SEG52/K7

54-57

SEG51-

SEG48

I/O

Same as P4, P5.

58-61

62-65

SEG47-

SEG44

SEG43-

SEG40

I/O

Serial I/O interface clock signal.

11

P0.0/K0

I/O

Serial data output.

12

P0.1/K1

I/O

Serial data input.

13

P0.2/K2

I/O

2 kHz, 4 kHz, 8 kHz or 16 kHz frequency output for

14

buzzer signal.

P0.3/K3

I

External interrupts. The triggering edge for INT0 and 23, 24 P1.0, P1.1

INT1 is selectable.

1-5

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