S3C7295 Ver la hoja de datos (PDF) - Samsung

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S3C7295

The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

Samsung 

S3C7295/P7295

PRODUCT OVERVIEW

PIN DESCRIPTIONS

Table 1-1. S3C7295 Pin Descriptions

Pin Name

Pin

Type

Description

Circuit Number Share Pin

Type

P0.0

P0.1

P0.2

P0.3

I/O 4-bit I/O port.

E-1

1-bit and 4-bit read/write and test are possible.

Individual pins are software configurable as input or

output.

Individual pins are software configurable as open-

drain or push-pull output.

Individual pull-up resistors are software assignable;

pull-up resistors are automatically disabled for

output pins.

11

TCLO0/K0

10

TCLO0/K1

9

CLO/BUZ/K2

8

BUZ/K3

P1.0

P1.1

P1.2

P1.3

I/O Same as port 0.

E-1

7

6

5

4

INT0

INT1

INT2

INT4

INT0, INT1

I/O External interrupts. The triggering edge for INT0

and INT1 is selectable.

7, 6

P1.0, P1.1

INT2

I/O Quasi-interrupt with detection of rising or falling

edges

5

P1.2

INT4

I/O External interrupt with detection of rising or falling

edges.

4

P1.3

BUZ

I/O 2 kHz, 4 kHz, 8 kHz or 16 kHz frequency output for

buzzer sound.

8

P0.3/K3

BUZ

I/O Inverted BUZ signal

9

P0.2/CLO/K2

CLO

I/O Clock output

9

P0.2/BUZ/K2

TCLO0

I/O Inverted Timer/counter 0 clock output

10

P0.1/K1

TCLO0

I/O Timer/counter 0 clock output

11

P0.0/K0

COM0–COM15 O LCD common signal output

H-6 39–24

–

SEG0–SEG43 O LCD segment signal output

H-6 40–80,

–

1–3

1-5

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