S3C24A0 Ver la hoja de datos (PDF) - Samsung

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S3C24A0

AN APPLICATION PROCESSOR FOR 2.5G/3G MOBILE PHONES

Samsung 

BSW rv0.1-0417-N01

PRELIMINARY PRODUCT OVERVIEW

S3C24A0 RISC MICROPROCESSOR

• 4 way set-associative cache with I-Cache (16KB) and D-Cache (16KB).

• 8-words per line with one valid bit and two dirty bits per line

• Pseudo random or round robin replacement algorithm.

• Write through or write back cache operation to update the main memory.

• The write buffer can hold 16 words of data and four addresses.

• ARM926EJ-S core supports the ARM debug architecture

• Internal AMBA (Advanced Microcontroller Bus Architecture) (AMBA2.0, AHB/APB)

• Dual AHB bus for high-performance processing (AHB-I & AHB-S)

1.2.2 Memory Subsystem

• High bandwidth Memory subsystem with two access channels (accesses from two AHB buses) and three-

channel memory ports

• Double the bandwidth with the simultaneous access capability

• ROM/SRAM/NOR-Flash/NAND-Flash channel

• One SDRAM channels

• Up to 1GB Address space

• Low-power SDRAM interface support : Mobile SDRAM function

- DS : Driver Strength Control

- TCSR : Temperature Compensated Self-Refresh Control

- PASR : Partial Array Self-Refresh Control

• NAND Flash Boot Loader with the ECC circuitry to support booting from NAND Flash

- 4KB Stepping Stone

- Support 1G, 2G bit NAND Flash

1.2.3 General Peripherals

• Interrupt Controller

- 61 Interrupt sources

(1 Watch Dog Timer, 5 Timer, 6 UART, 18 External Interrupts, 4 DMA, 2 RTC, 3 ADC, 1 I2C, 1 AC97, 1

NAND Flash, 1 IrDA, 1 Memory Stick, 2 SPI, 1 SDI, 2 USB (Host and Device), 1 Keypad, 1 Modem

Interface, 2 Camera Interface, 4 MPEG, 2 LCD, 1 Battery Fault, 1 Post)

- Level/Edge mode on external interrupt source.

- Programmable polarity of edge and level.

- Supports FIQ (Fast Interrupt request) for very urgent interrupt request.

• Timer with PWM (Pulse Width Modulation)

- 4-ch 16-bit Timer with PWM / 1-ch 16-bit internal timer with DMA-based or interrupt-based operation

- Programmable duty cycle, frequency, and polarity

- Dead-zone generation.

- Support external clock source.

1-4

Preliminary product information describes products that are in development,

for which full characterization data and associated errata are not yet available.

Specifications and information herein are subject to change without notice.

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