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S1R72U06 Ver la hoja de datos (PDF) - Seiko Epson Corp

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S1R72U06 Datasheet PDF : 32 Pages
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4. Functions
4. Functions
4.1 Serial I/F (UART/SPI)
The S1R72U06 is connected to the main CPU via UART (2-wire asynchronous) or SPI (clock synchronous).
When using with UART, set the SPIxUART mode setting pin to Low. When using with SPI, set the SPIxUART
mode setting pin to High.
The interface voltage (CVDD) can be used across a broad range, from 1.8 to 5.0 V.
UART connection (asynchronous serial I/F)
Initial baud rate: 300/9600 bps (set by mode setting pin INIT_BAUD)
Baud rate: Settable (max. 3 Mbps)
lsb first
8-bit data
1/2 stop bit
Odd/Even/No parity
SPI connection (clock synchronous serial I/F)
SPI slave
Mode 0 (Positive pulse latch first)
Baud rate: Max. 6 Mbps (SCK pin input)
msb first
8-bit data
4.2 USB Host SIE
The USB host function complies with the USB 2.0 (Universal Serial Bus Specification Revision 2.0) standard. It
supports FS (12 Mbps) and LS (1.5 Mbps) speed modes. The USB functions are controlled by the Bridge
Sequencer block inside the LSI. The USB classes supported are the Mass Storage Class and the Human Interface
Device Class.
4.3 USB Device SIE
The USB device function complies with the USB 2.0 (Universal Serial Bus Specification Revision 2.0) standard.
It supports FS (12 Mbps) and LS (1.5 Mbps) speed modes. The USB function is controlled by the Bridge
Sequencer block inside the LSI. The USB class supported is the Human Interface Device Class.
4.4 Transceiver Macro
This is a USB analog macro block shared by host and device.
4.5 FIFO
This FIFO block serves as a buffer for data between the serial interface and the USB.
4
Seiko Epson Corporation
S1R72U06 Data Sheet
(Rev. 1.10)

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