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RTC-4573 Ver la hoja de datos (PDF) - Seiko Epson Corp

Número de pieza
componentes Descripción
Fabricante
RTC-4573
EPSON
Seiko Epson Corp EPSON
RTC-4573 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
n Pin Connection
1. N.C
#1
2. N.C
3 N.C
4 N.C
5 CE1
6 DATA
7. CLK
8. N.C
#9
9 GND
18 N.C
#18
17 N.C
16 N.C
15 N.C
14 VDD
13 FOUT
12 CE0
11. / AIRQ
#10
10 / TIRQ
Symbol
CE1
DATA
CLK
GND
Pin-No.
5
6
7
9
I/O
Function
Chip enable 1 input pin.
This terminal has pull-down resistor built-in. Access to this RTC is possible in
Input "H" level both CE0,CE1 terminal. FOUT terminal can output frequency when
inputs "H" level into this terminal regardless of state of CE0 terminal. FOUT
terminal is high impedance state in input "L" level.
This I/O pin is used to for setting write mode/read mode, for writing an
Bi-
address, and for reading and writing data. This pin functions either as an
directional input pin or an output pin, according to the write mode/read mode setting
made in the first 8 bits of input data following the rising edge of the CE input.
Shift clock input pin. In write mode, the data is read from the DATA pin at
Input the rising edge of the CLK signal; in read mode, the data is output from the
DATA pin at the rising edge of the CLK signal.
-
Connect to the negative (ground) line of the power supply.
/ TIRQ
10
Output Open drain interrupt output pin for the interval timer.
/ AIRQ
11
Output Output Open drain interrupt output pin for alarms.
CE0
FOUT
Chip enable 0 input pin.
When high, access to the internal registers is enabled. While low, the
12
Input DATA pin goes to high impedance. When the CE pin is set low, the fr, TEST,
and RESET bits are forcibly cleared to "0".Set this pin low when turning the
power on, when the device is not to be accessed, and when using the
backup power supply. This pin does not affect FOUT terminal.
13
Output Frequency output terminal. Frequency is selectable by software.
VDD
14
-
Connect to the positive line of the power supply.
Access is possible between 1.6 and 5.5V
N.C.
1,2,3,
4,8,
15,16,
Although these pins are not connected internally, they should always be left
open in order to obtain the most stable oscillation possible.
17,18
* Always connect a passthrough capacitor of at least 0.1mF as close as possible between VDD and GND.
Page-2
Aug.1998

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