RT9287 Ver la hoja de datos (PDF) - Richtek Technology

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Fabricante

RT9287

Boost Converter for OLED Power with Dual LDO

Richtek Technology 

Preliminary

RT9287

Table 1. Suggested Resistance for Output Voltage

Control

Conditions

Case A :

Normal Voltage = 16V

(GPIO = 0V)

Dimming Voltage = 12V

(GPIO = 1.8V)

Case B :

Normal Voltage = 16V

(GPIO = 0V)

Dimming Voltage = 12V

(GPIO = 2.8V)

RA

(kΩ)

RB RGPIO

(kΩ) (kΩ)

990

102 445

990

94

690

L1

D1

4.7uH to 22uH SS0520

VOUT

+

VIN

2.7V to 5.5V

C1

1uF

RT9287

7

VDD2

LX 6

VENB>1.5V 4 ENB

VENB<0.4V

8 GND

FB 5

GPIO

C2

RA

OLED

RGPIO

RB

Figure 3. Application Circuit for 2-level Output Voltage

Control

Dual LDO

Like any low-dropout regulator, the external capacitors used

with the RT9287 must be carefully selected for regulator

stability and performance. Using a capacitor whose value

is > 1μF on the LDO input and the amount of capacitance

can be increased without limit. The input capacitor must

be located a distance of not more than 0.5 inch from the

input pin of the IC and returned to a clean analog ground.

Any high quality ceramic or tantalum capacitor can be

used for this part. The capacitor with larger value and lower

ESR (equivalent series resistance) provides better PSRR

and line-transient response.

The output capacitor must meet both requirements for

minimum amount of capacitance and ESR in all

applications. The LDO is designed specifically to work

with low ESR ceramic output capacitor in space-saving

and performance consideration. Using a ceramic capacitor

whose value is at least 1μF with ESR is > 20mΩ on the

LDO output ensures stability. The LDO still works well

with other kinds of output capacitor due to the wide stable

ESR range. Figure 4 shows the curves of allowable ESR

range as a function of load current for various output

DS9287-01 August 2007

capacitor values. Output capacitor of larger capacitance

can reduce noise and improve load transient response,

stability, and PSRR. The output capacitor should be located

not more than 0.5 inch from the VOUT pin of the LDO and

returned to a clean analog ground.

Region of Stable COUT ESR vs. Load Current

100

VIN = 5V, CIN = COUT1 = COUT2 = 1uF/X7R

10

Unstable Range

1

0.1

Stable Range

0.01

Simulation Verify

0.001

0

50

100 150 200 250 300

Load Current (mA)

Figure 4. Stable Cout ESR Range

Thermal protection limits power dissipation in LDO. When

the operating junction temperature exceeds a certain

temperature, the OTP circuit starts the thermal shutdown

function and turns the pass element off. The pass element

turns on again after the junction temperature is cooled

down. The RT9287 lowers its OTP trip level from 170°C to

110°C when output short circuit occurs (VOUT < 0.4V) as

shown in Figure 5. It reduces operating junction

temperature and provides maximum safety to customer

while output short circuit occurring.

VOUT Short to GND

VOUT

IOUT

0.4V

TSD

OTP Trip

170 °C

Point

110 °C

110 °C

IC Temperature

80 °C

Figure 5. Short Circuit Thermal Folded Back Protection

when Output Short Circuit Occurs (Patent)

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