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RT9603 Ver la hoja de datos (PDF) - Richtek Technology

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RT9603 Datasheet PDF : 10 Pages
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RT9603
Before driving the gate of the high side MOSFET up to
12V (or 5V), the low side MOSFET has to be off; and the
high side MOSFET is turned off before the low side is
turned on. From Figure 1, the body diode "D2" had been
turned on before high side MOSFETs turned on.
lgd1 = Cg1 dV = Cgd1 12V
(3)
dt
t r1
Before the low side MOSFET is turned on, the Cgd2 have
been charged to VIN. Thus, as Cgd2 reverses its polarity
and g2 is charged up to 12V, the required current is
lgd2 = C gd2 dV = C gd2 V i + 12V
(4)
dt
tr2
It is helpful to calculate these currents in a typical case.
Assume a synchronous rectified buck converter, input
voltage VIN = 12V, Vg1 = Vg2 = 12V. The high side MOSFET
is PHB83N03LT whose Ciss = 1660pF, Crss = 380pF, and
tr = 14ns. The low side MOSFET is PHB95N03LT whose
Ciss = 2200pF, Crss = 500pF and tr = 30ns, from the
equation (1) and (2) we can obtain
lgs1 = 1660 × 10 12 × 12 = 1.428 (A)
(5)
14 × 10 9
lgs2 = 2200 × 10 12 × 12 = 0.88 (A)
(6)
30 × 10 9
from equation. (3) and (4)
lgs1 = 380 × 10 12 × 12 = 0.326 (A)
(7)
14 × 10 9
I gd2
= 500
× 10 -12 × (12
30 × 10 9
+ 12)
= 0.4(A)
(8)
the total current required from the gate driving source is
Ig1 = Igs1 + Igd1 = (1.428 + 0.326) = 1.745(A) (9)
Ig2 = Igs2 + Igd2 = (0.88 + 0.4) = 1.28(A) (10)
By a similar calculation, we can also get the sink current
required from the turned off MOSFET.
Layout Consideration
Figure 2 shows the schematic circuit of a two-phase
synchronous buck converter to implement the RT9603.
The converter operates from 5V to 12V of VIN.
L1
VIN
12V 1.2uH
C1
1000uF
VCORE
C3
1500uF
D1
R1
12V
C4 10
C2
1
4
1uF
1uF
CB
BST VCC
1uF
2
Q1
8 DRVH
IN
PWM
L2
2uH
7 SW
PHB83N03LT
Q2
PHB95N03LT 5 DRVL
PGND 6
Figure 2. Two-Phase Synch. Buck Converter Circuit
When layout the PCB, it should be very careful. The power-
circuit section is the most critical one. If not configured
properly, it will generate a large amount of EMI. The junction
of Q1, Q2, L2 should be very close.
Next, the trace from DRVH, and DRVL should also be short
to decrease the noise of the driver output signals. SW
signals from the junction of the power MOSFET, carrying
the large gate drive current pulses, should be as heavy as
the gate drive trace. The bypass capacitor C4 should be
connected to PGND directly. Furthermore, the bootstrap
capacitors (CB) should always be placed as close to the
pins of the IC as possible.
Select the Bootstrap Capacitor
Figure 3 shows part of the bootstrap circuit of RT9603.
The VCB (the voltage difference between BST and SW on
RT9603) provides a voltage to the gate of the high side
power MOSFET. This supply needs to be ensured that
the MOSFET can be driven. For this, the capacitance CB
has to be selected properly. It is determined by following
constraints.
DS9603-08 March 2007
www.richtek.com
7

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