RT9603 Ver la hoja de datos (PDF) - Richtek Technology
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RT9603 Datasheet PDF : 10 Pages
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RT9603
Application Information
The RT9603 is designed to drive both high side and low
side N-MOSFET through externally input PWM control
signal. It has power-on protection function which held DRVH
and DRVL low before VCC up across the rising threshold
voltage. After the initialization, the PWM signal takes the
control. The rising PWM signal first forces the DRVL signal
turns low then DRVH signal is allowed to go high just after
a non-overlapping time to avoid shoot-through current. The
falling of PWM signal first forces DRVH to go low. When
DRVH and SW signal reach a predetermined low level,
DRVL signal is allowed to turn high. The non-overlapping
function is also presented between DRVH and DRVL signal
transient.
The PWM signal is acted as "High" if above the rising
threshold and acted as "Low" if below the falling threshold.
Any signal level enters and remains within the shutdown
window is considered as "tri-state", the output drivers
are disabled and both MOSFET gates are pulled and
held low. If left the PWM signal (IN) floating, the pin will
be kept at 2.1V by the internal divider and provide the
PWM controller with a recognizable level.
The RT9603 typically operates at frequency of 200kHz
to 250kHz. It shall be noted that to place a 1N4148 or
schottky diode between the VCC and BST pin as shown
in the typical application circuit.
Driving Power MOSFETs
The DC input impedance of the power MOSFET is
extremely high. When Vgs at 12V (or 5V), the gate draws
the current only few nano-amperes. Thus once the gate
has been driven up to "ON" level, the current could be
negligible.
However, the capacitance at the gate to source terminal
should be considered. It requires relatively large currents
to drive the gate up and down 12V (or 5V) rapidly. It also
required to switch drain current on and off with the required
speed. The required gate drive currents are calculated
as follows.
D1
d1
s1
L
VIN
Cgd1
Cgs1
Igd1 Igs1
Ig1
Ig2 Igd2
g2
g1
Igs2
Cgd2
d2
D2
Cgs2 s2
Vg1
VSW +12V
VOUT
GND
t
Vg2
12V
t
Figure 1. Equivalent Circuit and Associated Waveforms
In Figure 1, the current Ig1 and Ig2 are required to move
the gate up to 12V. The operation consists of charging
Cgd and Cgs. Cgs1 and Cgs2 are the capacitances from
gate to source of the high side and the low side power
MOSFETs, respectively. In general data sheets, the Cgs
is referred as "Crss" which is the input capacitance. Cgd1
and Cgd2 are the capacitances from gate to drain of the
high side and the low side power MOSFETs, respectively
and referred to the data sheets as "Crss" the reverse
transfer capacitance. For example, tr1 and tr2 are the rising
time of the high side and the low side power MOSFETs
respectively, the required current Igs1 and Igs2 are showed
,
below:
lgs1 = C gs1 dVg1 = C gs1 × 12
(1)
dt
t r1
lgs2 = C gs2 dVg2 = C gs2 × 12
(2)
dt
t r2
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DS9603-08 March 2007
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