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RT9173C Ver la hoja de datos (PDF) - Richtek Technology

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RT9173C Datasheet PDF : 13 Pages
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RT9173C
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity test board (4 Layers,
2S2P) of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for SOP-8 (Exposed
Pad) package.
Note 5. VOS offset is the voltage measurement defined as VOUT subtracted from VREFEN.
Note 6. Regulation is measured at constant junction temperature by using a 5ms current pulse. Devices are tested for load
regulation in the load range from 0A to 2A.
Note 7. Standby current is the input current drawn by a regulator when the output voltage is disabled by a shutdown signal on
REFEN pin (VIL < 0.2V). It is measured with VIN = VCNTL = 5V.
DS9173C-12 September 2007
www.richtek.com
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