RT8078A Ver la hoja de datos (PDF) - Richtek Technology
Número de pieza
componentes Descripción
Fabricante
RT8078A Datasheet PDF : 12 Pages
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RT8078A
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
Four-Layer PCB
WDFN 10L 3x3
SOP-8 (Exposed Pad)
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curves for the RT8078A Packages
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the IC.
Place the terminal of the input capacitor(s), CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
LX node experiences high frequency voltage swing and
should be kept within a small area.
Keep all sensitive small-signal nodes away from the LX
node to prevent stray capacitive noise pick up.
Connect the FB pin directly to the feedback resistors.
The resistive voltage divider must be connected between
VOUT and GND.
VOUT
Place the input and output
capacitors as close to the
IC as possible
COUT
LX should be connected
to inductor by wide and
short trace, and keep
sensitive components
away from this trace
L1
LX 1
LX 2
LX 3
PGOOD 4
EN 5
CIN
10 PVIN
9 PVIN
8 SVIN VIN
7 NC
11 6 FB
R1
VOUT
R2 Place the feedback as
close to the IC as possible
Figure 3. PCB Layout Guide for WDFN-10L 3x3
VOUT
Place the input and output
capacitors as close to the
IC as possible
COUT
LX should be connected
L1
to inductor by wide and
short trace, and keep
LX
sensitive components
away from this trace
LX
PGOOD
EN
8
2
7
GND
3
96
4
5
CIN
PVIN VIN
PVIN
SVIN
R1
FB
R2
VOUT
Place the feedback as
close to the IC as possible
Figure 4. PCB Layout Guide for SOP-8 (Exposed Pad)
www.richtek.com
10
DS8078A-01 June 2011
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