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M5M5Y816WG-55HI

8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM

MITSUBISHI ELECTRIC  

2002.04.05 Ver. 2.1

MITSUBISHI LSIs

M5M5Y816WG -55HI, -70HI, -85HI

8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM

FUNCTION

The M5M5Y816WG is organized as 524288-words by

16-bit. These dev ices operate on a single +1.65~2.3V

power supply , and are directly TTL compatible to both

input and output. Its f ully static circuit needs no clocks

and no ref resh, and makes it usef ul.

The operation mode are determined by a combination

of t he dev ice control inputs BC1# , BC2# , S1#, S2 ,

W# and OE#. Each mode is summarized in the f unction

table.

A write operation is executed whenev er the low lev el

W ov erlaps with the low lev el BC1# and/or BC2# and

the low lev el S1# and the high lev el S2. The

address(A0~A18) must be set up bef ore the write cycle

and must be stable during the entire cy c le.

A read operation is executed by s etting W# at a high

lev el and OE# at a low lev el while BC1# and/or BC2#

and S1# and S2 are in an activ e state(S1#=L,S2=H).

When setting BC1# at the high lev el and other pins

are in an activ e stage , upper-by t e are in a selectable

mode in which both reading and writing are enabled, and

lower-by t e are in a non-selectable mode. And when

setting BC2# at a high lev el and other pins are in an

activ e stage, lower-by t e are in a selectable mode and

upper-by te are in a non-selectable mode.

BLOCK DIAGRAM

When setting BC1# and BC2# at a high lev el or S1# at a

high lev el or S2 at a low lev el, the chips are in a non-

selectable mode in which both reading and writing are

disabled. In this mode, the output stage is in a high-

impedance state, allowing OR-tie with other chips and

memory expansion by BC1#, BC2# and S1#, S2.

The power supply current is reduced as low as 0.1µA(25°C,

Vcc=1.65V, ty pical), and the memory data can be held at

+1.3V power supply , enabling battery back-up operation

during power f ailure or power-down operation in the non-

selected mode.

FUNCTION TABLE

S1# S2 BC1#BC2# W# OE# Mode DQ1~8 DQ9~16 Icc

H L X X X X Non selection High-Z High-Z Standby

L L X X X X Non selection High-Z High-Z Standby

H H X X X X Non selection High-Z High-Z Standby

X X H H X X Non selection High-Z High-Z Standby

L H L H L X Write Din High-Z Activ e

L H L H H L Read Dout High-Z Activ e

L HL HH H

High-Z High-Z Activ e

L H H L L X Write High-Z Din Activ e

L H H L H L Read High-Z Dout Activ e

L HH L H H

High-Z High-Z Activ e

L H L L L X Write Din Din Activ e

L H L L H L Read Dout Dout Activ e

L HL L H H

High-Z High-Z Activ e

note1: "H" and "L" in this table mean VIH and VIL, respectiv ely .

note2: "X" in this table should be "H" or "L".

A0

DQ

1

A1

MEMORY ARRAY

524288 WORDS

DQ

8

x 16 BITS

A16

-

DQ

A18

9

S1#

CLOCK

GENERATOR

DQ

S2

16

BC1#

BC2#

Vcc

W#

OE#

GND

MITSUBISHI ELECTRIC

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