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R4F20223DFC Ver la hoja de datos (PDF) - Renesas Electronics

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R4F20223DFC Datasheet PDF : 992 Pages
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4.5 Interrupt Control Modes and Interrupt Operation ............................................................... 96
4.5.1 Interrupt Control Mode 0 .................................................................................... 96
4.5.2 Interrupt Control Mode 2 .................................................................................... 98
4.5.3 Interrupt Exception Handling Sequence ........................................................... 100
4.5.4 Interrupt Response Time................................................................................... 102
4.5.5 DTC Activation by Interrupt............................................................................. 102
4.6 Usage Notes ...................................................................................................................... 103
4.6.1 Conflict between Interrupt Generation and Disabling ...................................... 103
4.6.2 Instructions that Disable Interrupts ................................................................... 104
4.6.3 Time when Interrupts are Disabled................................................................... 104
4.6.4 Interrupts during Execution of EEPMOV Instruction....................................... 104
4.6.5 Changing PMR, ISCRH, ISCRL and INCCR................................................... 105
4.6.6 IRQ Status Register (ISR)................................................................................. 105
4.6.7 NMI Pin ............................................................................................................ 106
Section 5 Clock Pulse Generator .......................................................................107
5.1 Overview........................................................................................................................... 108
5.2 Register Descriptions........................................................................................................ 110
5.2.1 Backup Control Register (BACKR) ................................................................. 111
5.2.2 System Clock Control Register (SYSCCR)...................................................... 113
5.2.3 Power-Down Control Register 1 (LPCR1) ....................................................... 115
5.2.4 Power-Down Control Register 2 (LPCR2) ....................................................... 117
5.2.5 Power-Down Control Register 3 (LPCR3) ....................................................... 118
5.2.6 OSC Oscillation Settling Control Status Register (OSCCSR).......................... 120
5.2.7 High-Speed OCO Control Register (HOCR).................................................... 121
5.2.8 High-Speed OCO Trimming Data Protect Register (HOTRMDPR) ................ 122
5.2.9 High-Speed OCO Trimming Data Register 1 (HOTRMDR1).......................... 123
5.2.10 High-Speed OCO Trimming Data Register 2 (HOTRMDR2).......................... 124
5.2.11 High-Speed OCO Trimming Data Register 3 (HOTRMDR3).......................... 124
5.2.12 High-Speed OCO Trimming Data Register 4 (HOTRMDR4).......................... 125
5.3 Operation of Selection of System Base Clock .................................................................. 126
5.3.1 Switching System Base Clock to φhoco ........................................................... 129
5.3.2 Switching System Base Clock to φosc.............................................................. 131
5.3.3 Clock Change Timing ....................................................................................... 132
5.3.4 Backup Operation ............................................................................................. 135
5.4 High-Speed On-Chip Oscillator........................................................................................ 139
5.4.1 Procedures for Switching to 32MHz................................................................. 139
5.4.2 Trimming of High-Speed OCO......................................................................... 140
5.5 Main Clock Oscillator....................................................................................................... 142
5.5.1 Connecting Crystal Resonator .......................................................................... 142
Rev. 1.00 Oct. 03, 2008 Page xi of xxvi

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