PST573 Ver la hoja de datos (PDF) - Mitsumi

Número de pieza

componentes Descripción

Fabricante

PST573

SYSTEM RESET Monolithic IC

Mitsumi 

MITSUMI

Timing Chart

7

6

5

4

VCC/VOUT

(V)

3

2

1

0

RESET

ON

OFF

VCC

VOUT

Application circuits

1. Normal hard reset

2. Manual reset added

System Reset PST573

Time

VS

VS (CPU)

Undefined

Delay time (tpLH)

[ ] .=. CL RL

VCC-0.2

ln

+0.025 (mS)

Vscpu

CL : µF

RL : kΩ

Reset threshold voltage of

Vs cpu :

CPU, MPU, etc.

Voltage: V

Note: Connect a capacitor between IC pins 1 and 2

if VCC line impedance is high.

Note 1: Use RL, CL and Rm to prevent manual switch

chattering.

Note that Rm should be set to the following

conditions.

Rm <= 1/20RL

Note 2: Connect a capacitor between IC pins 1 and 2

if VCC line impedance is high.

3. Battery checker (LED ON for high voltage)

Note: Connect a capacitor between IC pins 1 and 2 if

VCC line impedance is high.

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