APPLICATION NOTE
PLCDA03
thru
PLCDA24
The PLCDA Series are low capacitance, bidirectional TVS arrays that are designed to protect I/O or high speed data lines from the damaging effects
of ESD or EFT. This product series has a surge capability of 500 Watts PPP per line for an 8/20µs waveshape and offers ESD protection > 40kv.
BIDIRECTIONAL COMMON-MODE CONFIGURATION (Figure 1)
Ideal for use in USB applications, the PLCDA Series provides up to two (2) lines of protection in a common-mode configuration as depicted in Figure 1.
Circuit connectivity is as follows:
✔ Pins 1 & 2 and 3 & 4 are connected to Ground
✔ Pins 5 and 6 are connected to I/O Line D+
✔ Pins 7 and 8 are connected to I/O Line D-
Figure 1. Typical Common-Mode USB Protection
Circuit
CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Circuit board layout is critical for Electromagnetic
Compatibility (EMC) protection. The following
guidelines are recommended:
✔ The protection device should be placed near the
input terminals or connectors, the device will
divert the transient current immediately before it
can be coupled into the nearby traces.
✔ The path length between the TVS device and
the protected line should be minimized.
✔ All conductive loops including power and ground
loops should be minimized.
✔ The transient current return path to ground
should be kept as short as possible to reduce
parasitic inductance.
✔ Ground planes should be used whenever
possible. For multilayer PCBs, use ground vias.
D+
USB
D-
IC
87 65
GND
12 34
05076.R 7 4/05
4
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