PM6344 Ver la hoja de datos (PDF) - PMC-Sierra

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componentes Descripción

Fabricante

PM6344

QUADRUPLE E1 FRAMER

PMC-Sierra 

STANDARD PRODUCT

PMC-951013

ISSUE 5

PMC-Sierra, Inc.

PM6344 EQUAD

QUADRUPLE E1 FRAMER

CONTENTS

1

FEATURES ........................................................................................................................1

2

APPLICATIONS .................................................................................................................4

3

REFERENCES ..................................................................................................................5

4

APPLICATION EXAMPLES ...............................................................................................7

5

BLOCK DIAGRAM .............................................................................................................8

6

PIN DIAGRAM .................................................................................................................11

7

PIN DESCRIPTION .........................................................................................................12

8

FUNCTIONAL DESCRIPTION ........................................................................................29

8.1 DIGITAL RECEIVE INTERFACE (DRIF) .............................................................29

8.2 CLOCK AND DATA RECOVERY (CDRC) ...........................................................29

8.3 FRAMER (FRMR) ...............................................................................................31

8.4 PERFORMANCE MONITOR COUNTERS (PMON)...........................................38

8.5 HDLC RECEIVER (RFDL) ..................................................................................38

8.6 ELASTIC STORE (ELST) ...................................................................................39

8.7 SIGNALING EXTRACTOR (SIGX) .....................................................................39

8.8 BACKPLANE RECEIVE INTERFACE (BRIF) .....................................................40

8.9 TRANSMITTER (TRAN) .....................................................................................40

8.10 TRANSMIT PER-CHANNEL SERIAL CONTROLLER (PCSC) ..........................41

8.11 HDLC TRANSMITTER (XFDL) ...........................................................................41

8.12 DIGITAL JITTER ATTENUATOR (DJAT) .............................................................42

8.13 TIMING OPTIONS (TOPS) .................................................................................46

8.14 DIGITAL E1 TRANSMIT INTERFACE (DTIF) .....................................................46

8.15 BACKPLANE TRANSMIT INTERFACE (BTIF) ...................................................47

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