PRODUCTION
DATASHEET
PMC-1981162
Issue 4
PMC-Sierra, Inc.
PM5313 SPECTRA-622
ISSUE 6
SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S
• Remove support for the tandem connection
• Removed RESBYP and TESBYPASS register bits
in RPPS and TPPS configuration. Bypass is no
longer programmable per slice but for all RPPS or
TPPS slices via the RESBYP and TESBYP bits
found in DROP and ADD BUS configuration
registers.
• Fix RASE filtering spec to 8 frames
• Correct DLL, APGM and DPGM register bits
description
• Describe use of ATSI bit in APGM autonomous
mode.
• Remove support of 12c when both autonomous
mode and DTMODE are use.
• Specify that FOOF affect only one frame
• Add TSTAD DC spec.
• Add power supply filtering and PECL I/O
diagrams
• Revise RPOH timing diagrams
• Add BYPASS Rx and TX mode description and
limitation. No support for TUAIS, tx dual mode
and pointer generation by STALs.
• Specify that activity on the AC1J1V1, ADP and
APL pins can not be detected if ADP is tied high
or low.
• Revised RPPS alarm bit names, register 0n1C
• Revised National bit description in the TTOC
register 00C1
• Revised signal mapping in register 0009
SPECTRA 622 Section Alarm Control #2
• Added pin description of the Transmit Ring
Control Port
• Fixed polarity for bit 7, register 0102
• Added TPIP is held in reset in DS3 mode only
• Revised TPAIS and DPAIS frame slots to correctly
correspond to slice order
• Clarified precedence of TOH Overhead port over
TSOW, TSUC, and TLOW
• Removed some DLL registers
PROPRIETARY AND CONFIDENTIAL
ii