PLL130-68QC-R Ver la hoja de datos (PDF) - PhaseLink Corporation
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PLL130-68QC-R Datasheet PDF : 5 Pages
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PLL130-68/-69
High Speed Translator Buffers: Single ended to PECL or LVDS
6. LVDS Electrical Characteristics
PARAMETERS
Output Differential Voltage
VDD Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
SYMBOL
VOD
∆VOD
VOH
VOL
VOS
∆VOS
IOXD
IOSD
CONDITIONS
RL = 100 Ω
(see figure)
Vout = VDD or GND
VDD = 0V
7. LVDS Switching Characteristics
MIN.
247
-50
0.9
1.125
0
TYP.
355
1.4
1.1
1.2
3
±1
-5.7
MAX.
454
50
1.6
1.375
25
±10
-8
UNITS
mV
mV
V
V
V
mV
uA
mA
PARAMETERS
Differential Clock Rise Time
Differential Clock Fall Time
SYMBOL
tr
tf
CONDITIONS
RL = 100 Ω
CL = 10 pF
(see figure)
MIN. TYP. MAX. UNITS
0.2
0.5
1.0
ns
0.2
0.5
1.0
ns
LVDS Levels Test Circuit
OUT
VOD
OUT
50Ω
VOS
50Ω
LVDS Switching Test Circuit
OUT
CL = 10pF
VDIFF
OUT
CL = 10pF
RL = 100Ω
LVDS Transistion Time Waveform
OUT
OUT
0V (Differential)
VDIFF
0V
20%
80%
tR
80%
20%
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/29/04 Page 4
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