DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

PLDC20RA10-20DMB Ver la hoja de datos (PDF) - Cypress Semiconductor

Número de pieza
componentes Descripción
Fabricante
PLDC20RA10-20DMB
Cypress
Cypress Semiconductor Cypress
PLDC20RA10-20DMB Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PLDC20RA10
Reprogrammable Asynchronous
CMOS Logic Device
1PLDC20RA10
Features
• Advanced-user programmable macrocell
CMOS EPROM technology for reprogrammability
• Up to 20 input terms
• 10 programmable I/O macrocells
• Output macrocell programmable as combinatorial or
asynchronous D-type registered output
• Product-term control of register clock, reset and set and
output enable
• Register preload and power-up reset
• Four data product terms per output macrocell
• Fast
— Commercial
tPD = 15 ns
tCO = 15 ns
tSU = 7 ns
— Military
tPD = 20 ns
tCO = 20 ns
tSU = 10 ns
• Low power
— ICC max - 80 mA (Commercial)
— ICC max = 85 mA (Military)
High reliability
— Proven EPROM technology
— >2001V input protection
— 100% programming and functional testing
Windowed DIP, windowed LCC, DIP, LCC, PLCC avail-
able
Functional Description
The Cypress PLDC20RA10 is a high-performance, sec-
ond-generation programmable logic device employing a flexi-
ble macrocell structure that allows any individual output to be
configured independently as a combinatorial output or as a
fully asynchronous D-type registered output.
The Cypress PLDC20RA10 provides lower-power operation
with superior speed performance than functionally equivalent
bipolar devices through the use of high-performance 0.8-mi-
cron CMOS manufacturing technology.
The PLDC20RA10 is packaged in a 24 pin 300-mil molded
DIP, a 300-mil windowed cerDIP, and a 28-lead square lead-
less chip carrier, providing up to 20 inputs and 10 outputs.
When the windowed device is exposed to UV light, the 20RA10
is erased and can then be reprogrammed.
Logic Block Diagram
VSS
I9
12
11
I8
I7
10
9
I6
I5
8
7
I4
I3
I2
I1
6
5
4
3
I0
PL
2
1
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
13
14
15
16
17
18
19
20
21
22
23
24
OE
I/O9
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
VCC
RA10–1
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-03012 Rev. **
Revised March 26, 1997

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]