PLDC20G10-25PC Ver la hoja de datos (PDF) - Cypress Semiconductor
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PLDC20G10-25PC Datasheet PDF : 14 Pages
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USE ULTRA37000™ FOR
ALL NEW DESIGNS
PLDC20G10B
PLDC20G10
AC Test Loads and Waveforms (Commercial)
R1 238 Ω
(319Ω MIL)
5V
OUTPUT
INCLUDING
JIG AND
SCOPE
50pF
(a)
R2 170Ω
(236Ω MIL)
5V
OUTPUT
INCLUDING
JIG AND
SCOPE
R1 238Ω
(319Ω MIL)
R2 170Ω
5 pF
(236Ω MIL)
(b)
Equivalent to: THÉVENIN EQUIVALENT (Commercial)
99Ω
OUTPUT
2.08V=Vthc
Equivalent to: THÉVENIN EQUIVALENT (Military/Industrial)
OUTPUT
136 Ω
2.13V=V thm
Switching Characteristics Over Operating Range[3, 8, 9]
Parameter
Description
tPD
tEA
tER
tPZX
tPXZ
tCO
tS
tH
tP[10]
tWH
tWL
fMAX[11]
Input or Feedback to Non-Registered Output
Input to Output Enable
Input to Output Disable
Pin 11 to Output Enable
Pin 11 to Output Disable
Clock to Output
Input or Feedback Set-up Time
Hold Time
Clock Period
Clock High Time
Clock Low Time
Maximum Frequency
B–15
Min. Max.
15
15
15
12
12
10
12
0
22
8
8
45.4
Commercial
B–20
–25
Min. Max. Min. Max.
20
25
20
25
20
25
15
20
15
20
12
15
12
15
0
0
24
30
10
12
10
12
41.6
33.3
–35
Min. Max.
35
35
35
25
25
25
30
0
55
17
17
18.1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
Switching Characteristics Over Operating Range [3, 8, 9]
Military/Industrial
B–20
B–25
–30
–40
Parameter
Description
Min. Max. Min. Max. Min. Max. Min. Max. Unit
tPD
Input or Feedback to Non-Registered Output
20
25
30
40 ns
tEA
Input to Output Enable
20
25
30
40 ns
tER
Input to Output Disable
20
25
30
40 ns
tPZX
Pin 11 to Output Enable
17
20
25
25 ns
tPXZ
Pin 11 to Output Disable
17
20
25
25 ns
tCO
Clock to Output
15
15
20
25 ns
tS
Input or Feedback Set-Up Time
15
18
20
35
ns
tH
Hold Time
0
0
0
0
ns
Notes:
8. Part (a) of AC Test Loads and Waveforms used for all parameters except tER, tPZX, and tPXZ. Part (b) of AC Test Loads and Waveforms used for tER, tPZX, and tPXZ.
9. The parameters tER and tPXZ are measured as the delay from the input disable logic threshold transition to VOH – 0.5V for an enabled HIGH output or VOL +
0.5V for an enabled LOW input.
10. tP, minimum guaranteed clock period is that guaranteed for state machine operation and is calculated from tP = tS + tCO. The minimum guaranteed period for
registered data path operation (no feedback) can be calculated as the greater of (tWH + tWL) or (tS + tH).
11. fMAX, minimum guaranteed operating frequency, is that guaranteed for state machine operation and is calculated from fMAX = 1/(tS + tCO). The minimum
guaranteed fMAX for registered data path operation (no feedback) can be calculated as the lower of 1/(tWH + tWL) or 1/(tS + tH).
Document #: 38-03010 Rev. *A
Page 6 of 14
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