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HI1386JCP Ver la hoja de datos (PDF) - Intersil

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componentes Descripción
Fabricante
HI1386JCP Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Pin Descriptions
PIN NUMBER
DIP
LCC
STANDARD
VOLTAGE
SYMBOL I/O LEVEL
19, 21, 31, 33, AGND -
0V
23, 25 35, 37
HI1386
EQUIVALENT CIRCUIT
18, 26, 27, 28, AVEE
-
28 40, 41,
44
16
23
CLK
I
15
22
CLK
-5.2V
ECL
DGND, DGND1
CLK
CLK
R
R
R
R
DESCRIPTION
Analog GND. Used as GND for
input buffers and latches of
comparators. Isolated from DGND,
DGND1, and DGND2.
Analog VEE -5.2V (Typ). Internally
connected to DVEE (Resistance:
4to 6). Bypass with 0.1µF to
AGND.
CLK Input.
Input Complementary to CLK.
When open pulled down to -1.3V.
Device is operable without CLK
input, but use of complementary
inputs of CLK and CLK is
recommended to obtain stable
high speed operation.
DVEE
RR
3, 12
-
DGND -
-
5, 19 DGND1 -
-
6, 16 DGND2 -
2, 13 4, 20
DVEE
-
0V
0V
0V
-5.2V
4
8
5
9
6
10
7
11
8
12
9
13
10
14
11
15
D0
O
ECL
D1
D2
D3
D4
D5
D6
D7
DGND
D1
Digital GND (used for internal
circuits and output transistors).
Digital GND (used for internal
circuits and output transistors).
Digital GND (used for output
buffers).
Digital VEE. Internally connected
to AVEE (resistance: 4to 6).
Bypass with 0.1µF to DGND
LSB of Data Outputs. External
pull-down resistor is required.
Data Outputs. External pull-down
resistors are required.
DVEE
MSB of Data Outputs. External
pull-down resistor is required.
3

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