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PIC16C781 Ver la hoja de datos (PDF) - Microchip Technology

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PIC16C781 Datasheet PDF : 188 Pages
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2.0 MEMORY ORGANIZATION
There are two memory blocks in each of these PIC®
microcontrollers. Each block (program and data mem-
ory) has its own bus, so that concurrent access can
occur.
Additional information on device memory may be found
in the PIC Mid-Range Reference Manual, (DS33023).
2.1 Program Memory Organization
The PIC16C781/782 devices have a 13-bit program
counter capable of addressing an 8K x 14 program
memory space. The PIC16C781 has 1K x 14 words of
program memory. The PIC16C782 has 2K x 14 words
of program memory. Accessing a location above the
physically implemented address causes a wraparound.
The RESET vector is at 0000h and the interrupt vector
is at 0004h.
FIGURE 2-1:
PIC16C781 PROGRAM
MEMORY MAP AND
STACK
PC<12:0>
CALL, RETURN
13
RETFIE, RETLW
Stack Level 1
Stack Level 2
Stack Level 8
RESET Vector
0000h
On-Chip
Program
Memory
Interrupt Vector
Page 0
0004h
0005h
03FFh
0400h
1FFFh
PIC16C781/782
FIGURE 2-2:
PIC16C782 PROGRAM
MEMORY MAP AND
STACK
PC<12:0>
CALL, RETURN
13
RETFIE, RETLW
Stack Level 1
Stack Level 2
Stack Level 8
RESET Vector
0000h
On-Chip
Program
Memory
Interrupt Vector
Page 0
0004h
0005h
07FFh
0800h
1FFFh
2.2 Data Memory Organization
The data memory is partitioned into multiple banks,
which contain the General Purpose Registers and the
Special Function Registers. Bits RP0 and RP1 are
bank select bits.
RP1 RP0 (STATUS<6:5>)
= 00 Bank0
= 01 Bank1
= 10 Bank2
= 11 Bank3
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are the General Purpose Registers, implemented
as static RAM. All implemented banks contain Special
Function Registers. Some frequently used Special
Function Registers from one bank are mirrored in
another bank for code reduction and quicker access.
2001-2013 Microchip Technology Inc.
Preliminary
DS41171B-page 11

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