M5M5V4R08J-20 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

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M5M5V4R08J-20

4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM

MITSUBISHI ELECTRIC  

MITSUBISHI LSIs

M5M5V4R08J-12,-15,-20

4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM

FUNCTION

The operation mode of the M5M5V4R08J is determined by a

combination of the device control inputs S, W and OE. Each mode

is summarized in the function table.

A write cycle is executed whenever the low level W overlaps

with the low level S. The address must be set-up before the write

cycle and must be stable during the entire cycle.

The data is latched into a cell on the trailing edge of W or S,

whichever occurs first, requiring the set-up and hold time relative

to these edge to be maintained. The output enable input OE

directly controls the output stage. Setting the OE at a high level,

the output stage is in a high impedance state, and the data bus

FUNCTION TABLE

contention problem in the write cycle is eliminated.

A read cycle is excuted by setting W at a high level and OE at a

low level while S are in an active state (S=L).

When setting S at high level, the chip is in a non-selectable

mode in which both reading and writing are disable. In this mode,

the output stage is in a high-impedance state, allowing OR-tie

with other chips and memory expansion by S.

Signal-S controls the power-down feature. When S goes high,

power dissapation is reduced extremely. The access time from S is

equivalent to the address access time.

S W OE

HXX

LLX

L HL

L HH

Mode

Non selection

Write

Read

DQ

High-impedance

Din

Dout

High-impedance

Icc

Stand by

Active

Active

Active

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

V cc

Supply voltage

Conditions

Ratings

Unit

-2.0* ~ 4.6

V

VI

Input voltage

VO

Output voltage

With respect to GND -2.0* ~ VCC+0.5 V

-2.0 * ~ VCC+0.5 V

Pd

Power dissipation

Ta=25 C

1000

mW

Topr

Operating temperature

0 ~ 70

C

Tstg(bias) Storage temperature(bias)

-10 ~ 85

C

Tstg

Storage temperature

-65 ~ 150

C

*Pulse width ≤ 20ns, In case of DC:-0.5V

DC

ELECTRICAL

CHARACTERISTICS (Ta=0

~

70

C,

Vcc=3.3V

+10%

-5%

unless

otherwise

noted)

Symbol

Parameter

Condition

Limits

Min Typ Max Unit

VIH High-level input voltage

VIL Low-level input voltage

VOH High-level output voltage IOH =-4mA

VOL Low-level output voltage IOL= 8mA

II

Input current

V I = 0~Vcc

I OZ

Output current in off-state VI (S)= VIH

VO= 0~Vcc

Active supply current

I CC1 (TTL level)

VI (S)= VIL

other inputs VIH or VIL

Output-open(duty 100%)

Stand by current

I CC2 (TTL level)

VI (S)= VIH

I CC3 Stand by current

*Pulse width ≤ 20ns, in case of AC :-3.0V

VI (S)= Vcc≥0.2V

other inputs VI≤0.2V

or VI≥Vcc-0.2V

2.0

-0.3*

2.4

12ns cycle

AC 15ns cycle

20ns cycle

DC

12ns cycle

AC 15ns cycle

20ns cycle

DC

Vcc+0.3 V

0.8 V

V

0.4 V

2 µA

10 µA

170

160 mA

150

110 120

85

80 mA

75

60

1

10 mA

MITSUBISHI

ELECTRIC

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