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PEB20324

Multichannel Network Interface Controller for HDLC + Extensions MUNICH128X

Infineon Technologies 

Multichannel Network Interface Controller for HDLC +

Extensions

MUNICH128X

PEB 20324

Version 2.2

1.1

Features

Four independent 24/32-channel HDLC PCM

Controllers with common PCI interface.

Each of them provides:

CMOS

• Dedicated 1024 byte Tx Buffer

• Dedicated 1024 byte Rx Buffer

• Dedicated Serial PCM Interface Controller

– T1 rates: 1.536, 1.544, 3.088, 6.176 Mbit/s

– E1 rates: 2.048, 4.096, 8.192 Mbit/s

P-MQFP-160-1

• Dedicated 64-channel DMA Controller

– Supports linked-list buffer processing

– 16-DWord Tx DMA FIFO

– 16-DWord Rx DMA FIFO

– 4-DWord burst of Rx descriptors

– 3-DWord burst of Tx descriptors

– n-DWord burst of configuration blocks

(n is unlimited according the MUNICH128X, but internal port arbitration may lead to

a lower typical burst size of 4 or 8 DWords)

• Dynamic Programmable Channel Allocation

– Compatible with T1/DS1 24-channel and CEPT 32-channel PCM byte format

– Concatenation of any, not necessarily consecutive, time slots to superchannels

independently for receive and transmit direction

– Support of H0, H11, H12 ISDN-channels

– Subchanneling on each time slot possible

Type

PEB 20324

PEF 20324

Hardware Reference Manual

Package

P-MQFP-160-1

P-MQFP-160-1

8

04.99

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