PEB2035-N Ver la hoja de datos (PDF) - Siemens AG
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PEB2035-N Datasheet PDF : 134 Pages
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PEB 2035
1.3 Pin Definitions and Functions (cont’d)
P-LCC
Pin No.
30
31
P-DIP Symbol
Pin No.
26
RDIM
27
RDIP
32
28
SYPQ
33
29
ROID /
XRCLK
Input (I)
Output (O)
I
I
I
I
Function
Receive Data In Minus
Receive Data In Plus
Inputs for received dual rail PCM(+) and PCM(–)
route signals which will be latched on negative
transitions of RRCLK. Input sense is selected by
bit RC0.RDIS (after RESET: active low). Signal
decoding depends on the PCM mode selected via
bit MODE.PMOD:
– PCM 30: HDB3 line code with 2048 kbit/s.
– PCM 24: If optical interface mode is disabled
the selected line code with 1544 kbit/s depends
on bit MODE.CODE (B8ZS or AMI with B7
stuffing). After enabling optical interface mode
via bit MODE.OPT port RDIP will be switched
to input for single rail unipolar data. In this case,
port RDIM has no function.
Synchronous Pulse
Defines the beginning of time-slot 0 at system
highway ports RDO, and XDI in conjunction with
the values of registers RC0.RCO, RC1.RTO,
XC0.XCO, and XC1.XTO.
Pulse Cycle: Integer multiple of 125 µs.
PCM 30: Receive Optical Interface Data
Unipolar data received from fibre optical interface
with 2048 kbit/s. The input sense is programmed
via bit RC0.RDIS. Latching of data is done with the
falling edge of RRCLK if optical interface mode is
enabled via bit MODE.OPT.
PCM 24: Transmit Route Clock
Input for 1544-kHz transmit route clock provided
from an external clock generator. To avoid
transmit slips it must be phase locked to a
common submultiple of the system clock SCLK
such as 8 kHz. In case of an error condition
reported via bit ASR.XSLP the transmit time-slot
counter has to be set to its initial start position by
programming its offset value XC1.XTO5 … 0.
Semiconductor Group
14
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