HYS64V32220GU-8B Ver la hoja de datos (PDF) - Infineon Technologies
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HYS64V32220GU-8B Datasheet PDF : 17 Pages
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HYS 64(72)V16200/3222(0)0/64220GU
SDRAM Modules
Operating Currents
TA = 0 to 70 °C, VCC = 3.3 V ± 0.3 V 1
Recommended Operating Conditions unless otherwise noted
Parameter & Test Condition
Symb.
Operating current
tRC ≥ tRC(MIN.), tCK ≥ tCK(MIN.)
Outputs open, Burst Length = 4, CL = 3
All banks operated in random access,
all banks operated in ping-pong manner to maximize
gapless data access
Precharged Standby Current in
Power Down Mode
CS = VIH(MIN.), CKE ≤ VIL(MAX.)
Precharged Standby Current in Non-
power Down Mode
CS = VIH(MIN.), CKE ≥ VIH(MIN.)
No operating current
tCK = min., CS = VIH(MIN.),
active state (max. 4 banks)
tCK = min.
tCK = min.
CKE ≥ VIH(MIN.)
CKE ≤ VIL(MAX.)
ICC1
×4
×8
× 16
ICC2P
ICC2N
ICC3N
ICC3P
-8/-8B -10
max.
210 165
210 165
210 165
2
2
19
16
45
40
10
10
Unit Note
mA 2
mA
mA
mA 2
mA 2
mA 2
mA 2
Burst operating current
tCK = min.,
Read command cycling
Auto refresh current
tCK = min.,
Auto Refresh command cycling
Self refresh current
Self Refresh Mode, CKE = 0.2 V
–
ICC4
×4
210
165
mA 2, 3
×8
210 165 mA
× 16
210 165 mA
–
ICC5
240 195 mA 2
standard version ICC6
2.5
2.5
mA 2
Notes
1. All values are shown per one SDRAM component.
2. These parameters depend on the cycle rate. These values are measured at 100 MHz for -8
and at 66 MHz for -10 parts. Input signals are changed once during tCK, excepts for ICC6 and for
standby currents when tCK = infinity.
3. These parameters are measured with continuous data stream during read access and all DQ
toggling. CL = 3 and BL = 4 is assumed and the VDDQ current is excluded.
Semiconductor Group
8
1998-08-01
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