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PCA9549

Octal bus switch with individually I2C-bus controlled enables

Philips Electronics 

Philips Semiconductors

PCA9549

Octal bus switch with individually I2C-bus controlled enables

6. Functional description

6.1 Device addressing

Following a START condition, the bus master must output the address of the slave it is

accessing. The address of the PCA9549 is shown in Figure 5. To conserve power, no

internal pull-up resistors are incorporated on the hardware selectable address pins and

they must be pulled HIGH or LOW.

1 1 1 0 A2 A1 A0 R/W

fixed

hardware

selectable

002aaa962

Fig 5. Slave address

The last bit of the slave address defines the operation to be performed. When set to

logic 1 a read is selected, while a logic 0 selects a write operation.

6.2 Control register

Following the successful acknowledgement of the slave address, the bus master will send

a byte to the PCA9549, which will be stored in the Control register. If multiple bytes are

received by the PCA9549, it will save the last byte received. This register can be written

and read via the I2C-bus.

Fig 6. Control register

channel selection bits

(read/write)

76543210

B7 B6 B5 B4 B3 B2 B1 B0

bit 1

bit 2

bit 3

bit 4

bit 5

bit 6

bit 7

bit 8

002aab254

6.2.1 Control register definition

One or several bits are selected by the contents of the Control register. This register is

written after the PCA9549 has been addressed. The entire control byte is used to

determine which bit is to be selected. When a bit is selected to close, the bit will close

after the Acknowledge has been placed on the I2C-bus.

PCA9549_1

Product data sheet

Rev. 01 — 11 July 2006

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.

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