PCA9530DP Ver la hoja de datos (PDF) - NXP Semiconductors.
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PCA9530DP Datasheet PDF : 24 Pages
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NXP Semiconductors
5. Pinning information
5.1 Pinning
PCA9530
2-bit I2C-bus LED dimmer
A0 1
LED0 2
LED1 3
VSS 4
8 VDD
7 SDA
PCA9530D
6 SCL
5 RESET
002aae496
Fig 2. Pin configuration for SO8
A0 1
LED0 2
LED1 3
VSS 4
PCA9530DP
8 VDD
7 SDA
6 SCL
5 RESET
002aae497
Fig 3. Pin configuration for TSSOP8
(MSOP8)
5.2 Pin description
Table 2.
Symbol
A0
LED0
LED1
VSS
RESET
SCL
SDA
VDD
Pin description
Pin
1
2
3
4
5
6
7
8
Description
address input 0
LED driver 0
LED driver 1
supply ground
active LOW reset input
serial clock line
serial data line
supply voltage
6. Functional description
Refer to Figure 1 “Block diagram”.
6.1 Device addressing
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9530 is shown in Figure 4. To conserve power, no
internal pull-up resistor is incorporated on the hardware selectable address pin and it must
be pulled HIGH or LOW.
Fig 4. Slave address
slave address
1 1 0 0 0 0 A0 R/W
fixed
hardware
selectable
002aae499
PCA9530_3
Product data sheet
Rev. 03 — 26 February 2009
© NXP B.V. 2009. All rights reserved.
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