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PCA8565

4-bit multiplexed/1-bit latched 5-bit I2C EEPROM

NXP Semiconductors. 

NXP Semiconductors

8. Device protection diagram

PCA8565

Real time clock/calendar

OSCI

VDD

OSCO

CLKOUT

INT

SCL

VSS

SDA

PCA8565

mce169

Fig 4. Device diode protection diagram of PCA8565

9. Functional description

The PCA8565 contains sixteen 8-bit registers with an auto-incrementing address register,

an on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which

provides the source clock for the Real Time Clock (RTC), a programmable clock output, a

timer, an alarm, a voltage-low detector and a 400 kHz I2C-bus interface.

All 16 registers are designed as addressable 8-bit registers although not all bits are

implemented:

• The first two registers (memory address 00h and 01h) are used as control and status

registers

• The registers at memory addresses 02h through 08h are used as counters for the

clock function (seconds up to years counters)

• Address locations 09h through 0Ch contain alarm registers which define the

conditions for an alarm

• The register at address 0Dh controls the CLKOUT output frequency

• At address 0Eh is the timer control register and address 0Fh contains the timer value

The arrays SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS as

well as the bit fields MINUTE_ALARM, HOUR_ALARM, DAY_ALARM and

WEEKDAY_ALARM are all coded in Binary Coded Decimal (BCD) format.

When one of the RTC registers is read the contents of all time counters are frozen. This

prevents faulty reading of the clock or calendar during a carry condition (see

Section 10.5.3).

PCA8565_2

Product data sheet

Rev. 02 — 16 June 2009

© NXP B.V. 2009. All rights reserved.

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