EM78P156E Ver la hoja de datos (PDF) - ELAN Microelectronics

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EM78P156E

8-bit CMOS microprocessor, 1K13-bit (OTP-ROM), 2.3V~5.5V

ELAN Microelectronics 

EM78P156E

• Internal data transfer, or instruction operand holding

• It can not be addressed.

2. CONT (Control Register)

7

6

5

4

3

2

-

/INT

TS

TE

PAB

PSR2

Bit 0 (PSR0)~Bit 2 (PSR2) TCC/WDT prescaler bits.

PSR2

0

0

0

0

1

1

1

1

PSR1

0

0

1

1

0

0

1

1

PSR0

0

1

0

1

0

1

0

1

TCC Rate

1:2

1:4

1:8

1:16

1:32

1:64

1:128

1:256

1

PSR1

0

PSR0

WDT Rate

1:1

1:2

1:4

1:8

1:16

1:32

1:64

1:128

Bit 3 (PAB) Prescaler assignment bit.

0: TCC

1: WDT

Bit 4 (TE) TCC signal edge

0: increment if the transition from high to low takes place on TCC pin

1: increment if the transition from high to low takes place on TCC pin

Bit 5 (TS) TCC signal source

0: internal instruction cycle clock

1: transition on TCC pin

Bit 6 (INT) Interrupt enable flag

0: masked by DISI or hardware interrupt

1: enabled by ENI/RETI instruction

• CONT register is both readable and writable.

3. IOC5 ~ IOC6 (I/O Port Control Register)

• “1” puts the relative I/O pin into high impedance, while “0” defines the relative I/O pin as output.

• Only the lower 4 bits of IOC5 are able to be defined.

• IOC5 and IOC6 registers are both readable and writable.

4. IOCA (Prescaler Counter Register)

• IOCA register is readable.

• The value of IOCA is equal to the contents of Prescaler counter.

• Down counter.

* This specification is subject to be changed without notice. 8.11.1999

B3-6

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