E-STE100P Ver la hoja de datos (PDF) - STMicroelectronics
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E-STE100P Datasheet PDF : 31 Pages
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STE100P
Table 5. Register Descriptions (continued)
Bit #
Name
Descriptions
Default Val RW Type
11
PDEN Power-down mode control.
0
R/W
1: Power-down mode is selected. Setting this bit puts the
STE100P into power-down mode. During the power-down
mode, TXP/TXN and all LED outputs are 3-stated, and the MII
interface is isolated.
10
ISOEN 0 – Normal operation.
0
R/W
1 – Isolate PHY from MII.
Setting this control bit isolates the STE100P from the MII, with
the exception of the serial management inter-face. When this
bit is asserted, the STE100Pdoes not respond to TXD[3:0],
TX-EN, and TX-ER inputs, and it presents a high impedance
on its TX-CLK, RX-CLK, RX-DV, RX-ER, D[3:0], COL, and
CRS outputs.
9
RSAN Re-Start Auto-Negotiation process control.
0
R/W
1: Auto-Negotiation process will be re-started. This bit will be
cleared by STE100P itself after the Auto-negotiation restarted.
8
DPSEL Full/Half duplex mode select.
0
R/W
1: Full duplex mode is selected. This bit will be ignored if Auto-
Negotiation is enabled (bit 12 of PR0 = 1).
0: Half duplex mode is selected
7
COLEN Collision test control.
0
R/W
1: Collision test is enabled. 0: normal operation
This bit, when set, causes the COL signal to be asserted as a
result of the assertion of TX _EN. De-assertion of TX_EN will
cause the COL signal to be de-asserted.
6~0
---
Reserved
0
RO
R/W = Read/Write able. RO = Read Only.
PR1- XSR, XCVR Status Register. All the bits of this register are read only.
15
T4
100BASE-T4 ability.
Always 0, since STE100P has no T4 ability.
0
RO
14
TXFD 100Base-TX full duplex ability.
1
RO
Always 1, since STE100P has the 100Base-TX full duplex
ability.
13
TXHD 100Base-TX half duplex ability.
1
RO
Always 1, since STE100P has the 100Base-TX half duplex
ability.
12
10FD 10Base-T full duplex ability.
1
RO
Always 1, since STE100P has 10Base-T full duplex ability.
11
10HD 10Base-T half duplex ability.
1
RO
Always 1, since STE100P has 10Base-T half duplex ability.
10~7
---
Reserved
0
RO
9/31
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