PBL3766QN Ver la hoja de datos (PDF) - Ericsson
Número de pieza
componentes Descripción
Fabricante
PBL3766QN Datasheet PDF : 18 Pages
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PBL 3766
RINGRLY 5
VBAT 6
RSG 7
NC 8
E0 9
VBAT 10
DET 11
25 NC
24 VBAT
23 DT
22 RD
21 HPR
20 HPT
19 VTX
GND 1
VCC 2
RINGRLY 3
RSG 4
VBAT 5
VBAT 6
E0 7
DET 8
C2 9
C1 10
RDC 11
22 RINGX
21 TIPX
20 DT
19 RD
18 VBAT
17 VBAT
16 HPR
15 HPT
14 VTX
13 VEE
12 RSN
Figure 7. Pin configuration, 28-pin plastic leaded chip carrier and 22-pin plastic dual-in-line package, top view.
Pin Description
PLCC: 28-pin, plastic, j-leaded chip carrier. DIP: 22-pin, dual-in-line (batwing), plastic package. Refer to figure 7.
PLCC DIP Symbol
Description
1
-
RINGX RINGX is internally connected to RINGX. RINGX is used during manufacturing, but
Sense
Sense
Sense
requires no connection in SLIC applications, i.e. leave open.
2
1 GND
Ground.
3
-
VBAT
Refer to PLCC, terminal 6 description.
4
2 VCC
+5 V power supply.
5
3 RINGRLY Ring relay driver output. Open emitter with grounded collector (npn). Sources 50 mA from ground
to a relay coil connected to a negative voltage. Must be protected by external inductive kick-back
diode. Positive voltage relay driver can be provided as a metal mask option. Contact factory for
availability.
6, 3, 5, 6, VBAT
10, 17, 17, 18
24
Battery supply voltage. Negative with respect to GND. -21 V to -58 V. All VBAT terminals
should be connected to printed circuit board traces to provide heatsinking.
7
4 RSG
Saturation guard programming resistor, RSG, connects from this terminal to VEE. Leave open for
nominal battery voltages from -24 V to -28 V. Connect to VEE for a nominal battery voltage of -48
V. For other battery voltages and for detailed information refer to section Battery Feed.
8
-
NC
No internal connection. Note 1.
9
7 E0
TTL compatible enable input. Enables the DET output, when set to logic level low and disables the
DET output, when set to logic level high. Refer to section Enable Input for detailed information.
10
-
VBAT
Refer to PLCC, terminal 6 description.
4-8
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