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M62398FP

8BIT 12CH I2C BUS D–A CONVERTER WITH BUFFER AMPLIFIERS

MITSUBISHI ELECTRIC  

MITSUBISHI <Dig./Ana. INTERFACE>

M62398P,FP

8BIT 12CH I2C BUS D–A CONVERTER WITH BUFFER AMPLIFIERS

TIMING CHART (MODEL)

•start condition to slave address bite

SDA

1

2

3

4

5

6

7

W

A

SCL

R

DAC

output

start condition

•sub address bite

SDA

1

2

3

4

5

6

7

8

A

SCL

R

DAC

output

•DAC data bite to stop condition

SDA

1

2

3

4

5

6

7

8

A

SCL

R

DAC

output

stop condition

•Start condition ……… With SCL at HIGH,SDA line goes from HIGH to LOW

•Stop condition ……… With SCL at HIGH,SDA line goes from LOW to HIGH

(*Under normal circumstances,SDA is changed when SCL is LOW)

•Acknowledge bit …… The receiving IC has to pull down SDA line whenever receive slave data.

(The transmitting IC releases the SDA line just then transmit 8bit data.)

MITSUBISHI ELECTRIC

1997-5-28D.rev ( 6 / 7)

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