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CXD2301Q Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza
componentes Descripción
Fabricante
CXD2301Q Datasheet PDF : 23 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Description
Pin No. Symbol
1
VRB
23
VRT
2, 3, 7,
28, 31
AVSS
4
SEL
5
CE
19
TEST
6
CLE
18
CLK
20
CLP
8
DVSS
9 to 16 D7 to D0
17
DVDD
Equivalent circuit
AVDD
RTS Rref
23
1
AVSS
AVDD
4
5
19
DVSS
AVSS
AVDD
6
18
20
CE
AVSS
Di
CXD2301Q
Description
Reference voltage (bottom)
Connect to AVSS for normal use.
When another external voltage is input,
connect an external 0.1µF capacitor and
retain a 1.5V differential compared to the
top reference voltage.
Reference voltage (top)
By setting VRB to AVSS, outputs
approximately 1.5V.
Connect only a 0.1µF external by-pass
capacitor for normal use.
When another external voltage is input, it
must be 2.2V or lower.
Analog GND.
Switches the input of the 3x amplifier.
When SEL is at Low level, VIN1 is selected.
When SEL is at High level, VIN2 is selected.
Standby function ON/OFF selector.
In standby state when High.
Fix to VSS for normal use.
When CLE = Low: Clamp functiion is
enabled.
When CLE = High: Clamp function is
disabled, and only the normal A/D
converter function is enabled.
Clock input
Inputs the clamp pulse to Pin 20 (CLP).
Clamps the High interval signal voltage.
Digital GND.
D7 (MSB) to D0 (LSB) output
Outputs Low level in standby.
In operation, the phase of D7 to D0
output is inverted against the phase of
ADIN.
5V or 3.3V
–3–

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