TB62725N Ver la hoja de datos (PDF) - Marktech Optoelectronics
Número de pieza
componentes Descripción
Fabricante
TB62725N Datasheet PDF : 15 Pages
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TOSHIBA
T B 6 2 7 2 5 P / F / FN
OUTPUT CURRNET vs REXT RESISTOR
TB62725P/F/FN REXT-IOUT (Topr)
VDD=3.3(V), VCE=0.7(V)
90
80
70
60
50
Topr=-40(degC)
Topr=+25(degC)
40
Topr=+85(degC)
30
20
10
0
100
1000
REXT(Ohms)
IOUT[mA]=(1.14/REXT[ohms])*16 -- Theory formula
10000
APPLICATION NOTES(1 of 2)
TB62725P/F/FN application circuit (a general example)
TB62725 Series recommend VLED=VDD= 3.3(V min) and data transfer of fclk=20(MHz) is possible at cascade connection.
1 : Vf of LED is Vf=2.5 (V max).
2 : Output saturation Vce1 = 0.4(V min) at Iout <= 40(mA) of TB62725.
3 : Output saturation Vce2 = -0.25(V max) at Ic = -1(A) of TD62M8600F.
4 : TB62725 can move with VDDopr = 3 to 3.6(V).
5 : When a necessary voltage to 1 from 3 is summed up,
the total voltage is less than 3.3(V),
and this circuit can move with VLED = VDD = 3.3 (V min).
Example) TD62M8600F
8-bit Multi-Chip PNP Tr Array,
which is not used in Static Lighting System.
Not Connect Resistor
C.U.
SCAN
O0 O1 O2
O5 O6 O7
S-IN
S-OUT
8-bit SIPO,Latches &
ENA
Constant Sink Current Drivers
S-IN
ENA
O0 O1 O2
O5 O6 O7
8-bit SIPO,Latches &
Constant Sink Current Drivers
S-OUT
LAT
CLK TB62725P/F/FN
LAT
CLK
TB62725P/F/FN
VLED
r2
r1
r1
r1 : Resistance for a setup of output current.
r2 : Resistance for the LED module brightness adjustment.
This device owns only one ground pin that means signal ground pin and power ground pin are common.
If ground pattern layout contains large inductance and impedance, and the voltage between ground and LATCH, CLOCK terminals
exceeds 0.5*Vdd by switching noise in operation, this device may miss-operate.
So we would lile you to pay attention to pattern layout to minimize inductance.
marktech
optoelectronics
120 Broadway Menands, New York 12204
Toll Free: (800) 98-4LEDS Fax: (518) 432-7454
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