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P90CE201

16-bit microcontroller

Philips Electronics 

Philips Semiconductors

16-bit microcontroller

Product specification

P90CE201

5.5 Stack format

The stack format for exception processing is similar to the 68010 (rather than the 68000) although the information stored

is not the same due to the different architecture. To handle this format the P90CE201 differs from the 68000 in that:

• The stack format has changed.

• The minimum number of words put into, or restored from, the stack is 4 (68010 compatible; not 3 as with the 68000).

• The RTE instruction decides (with the aid of the 4 format bits) whether or not more information has to be restored. The

P90CE201 long format is used for bus error and address error exceptions; all other exceptions use the short format.

• If another format code, other than one of the two listed above, is detected during the restore action, a Format Error

occurs.

If the user wants to finish the instruction in which the bus or address error occurred, the P90CE201 format must be used

on RTE. If no changes to the stack are required during exception processing, the stack format is transparent to the user.

5.5.1 LONG AND SHORT STACK FORMATS

handbook, 4 columSnPs

Long

Stack

Format

SR

PCH

Short

Stack

PCL

Format

FORMAT (4 bits) VECTOR NUMBER

SSW

MM

INTERNAL INFORMATION

INTERNAL INFORMATION

TPDH

TPDL

TPFH

TPFL

DBINH

DBINL

IR

IRC

INTERNAL INFORMATION

MCD512

SR

Status Register.

PCH/PCL

Program Counter High/Low Word.

FORMAT

Indicating either a short stack

(only the first 4 words), or the long

stack format for bus and address

error exceptions. See Fig.9.

VECTOR NUMBER

The vector number of the

exception in the vector table; e.g.

2 for a bus error and 3 for an

address error. See Fig.9.

SSW

Special Status Word; see Fig.8.

MM

Current Move Multiple Mask.

TDPH/TDPL

In the event of a faulty write cycle,

the data can be found here.

TPFH/TPFL

The address used during the faulty

bus cycle.

DBINH/DBINL

Data that has been read prior to

the faulty cycle can in some cases

be found here.

IR

Holds the current instruction

being executed.

IRC

Holds either the present

instruction being executed or the

prefetched instruction.

Fig.7 Stack format.

August 1993

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